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authorAndre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>2020-03-20 09:07:10 +0000
committerAndre Vieira <andre.simoesdiasvieira@arm.com>2020-03-20 09:08:39 +0000
commit0efe7d8796e00a5737017fe472680b653bd83d90 (patch)
treebf319ea475f48f72c4e48adb57e67b7edeef34b2 /gcc/config
parent4119cd693d27e9dd87c547de75283edd45bf6dce (diff)
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gcc, Arm: Fix MVE move from GPR -> GPR
This patch fixes the pattern mve_mov for the case where both MVE vectors are in R registers and the move does not get optimized away. I use the same approach as we do for NEON, where we use four register moves. gcc/ChangeLog: 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/arm/mve.md (mve_mov<mode>): Fix R->R case. gcc/testsuite/ChangeLog: 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com> * gcc.target/arm/mve/intrinsics/mve_move_gpr_to_gpr.c: New test.
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/arm/mve.md4
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 5667882..b80a2a6 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -663,7 +663,7 @@
else
return "vldrb.8 %q0, %E1";
case 5:
- return output_move_neon (operands);
+ return output_move_quad (operands);
case 7:
return "vstrb.8 %q1, %E0";
default:
@@ -671,7 +671,7 @@
return "";
}
}
- [(set_attr "type" "mve_move,mve_move,mve_move,mve_move,mve_load,mve_move,mve_move,mve_store")
+ [(set_attr "type" "mve_move,mve_move,mve_move,mve_move,mve_load,multiple,mve_move,mve_store")
(set_attr "length" "4,8,8,4,8,8,4,4")
(set_attr "thumb2_pool_range" "*,*,*,*,1018,*,*,*")
(set_attr "neg_pool_range" "*,*,*,*,996,*,*,*")])