emit-rtl.c (adjust_address): New function.

	* emit-rtl.c (adjust_address): New function.
	* expr.h (adjust_address): Add declaration.
	* builtins.c: Replace some calls to change_address with calls to it
	or to validize_mem.
	* caller-save.c, dwarf2out.c, except.c, expmed.c, expr.c: Likewise.
	* function.c, config/a29k/a29k.md, config/alpha/alpha.c: Likewise.
	* config/arm/arm.c, config/convex/convex.c: Likewise.
	* config/dsp16xx/dsp16xx.md, config/fr30/fr30.c: Likewise.
	* config/i386/i386.c, config/i386/i386.md: Likewise.
	* config/ia64/ia64.c, config/ia64/ia64.md: Likewise.
	* config/m32r/m32r.c, config/m68k/m68k.md: Likewise.
	* config/m88k/m88k.c, config/mips/mips.md: Likewise.
	* config/ns32k/ns32k.c, config/rs6000/rs6000.c: Likewise.
	* config/sh/sh.c, config/sparc/sparc.md: Likewise.

From-SVN: r43702

19 files changed, 134 insertions, 212 deletions

diff --git a/gcc/config/a29k/a29k.md b/gcc/config/a29k/a29k.md
index 998d892..a6c29d3 100644
--- a/gcc/config/a29k/a29k.md
+++ b/gcc/config/a29k/a29k.md
@@ -1,5 +1,6 @@
 ;;- Machine description for AMD Am29000 for GNU C compiler
-;;   Copyright (C) 1991, 1992, 1994, 1998, 1999 Free Software Foundation, Inc.
+;;   Copyright (C) 1991, 1992, 1994, 1998, 1999, 2001
+;;   Free Software Foundation, Inc.
 ;;   Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
 
 ;; This file is part of GNU CC.
@@ -2375,8 +2376,7 @@
       operands[1] = force_const_mem (TImode, operands[1]);
       if (! memory_address_p (TImode, XEXP (operands[1], 0))
 	  && ! reload_in_progress)
-        operands[1] = change_address (operands[1], TImode,
-				      XEXP (operands[1], 0));
+        operands[1] = adjust_address (operands[1], TImode, 0);
     }
 }")
 
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 37a8313..ffd3786 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -2397,9 +2397,8 @@ alpha_split_tfmode_pair (operands)
     }
   else if (GET_CODE (operands[1]) == MEM)
     {
-      operands[3] = change_address (operands[1], DImode,
-				    plus_constant (XEXP (operands[1], 0), 8));
-      operands[2] = change_address (operands[1], DImode, NULL_RTX);
+      operands[3] = adjust_address (operands[1], DImode, 8);
+      operands[2] = adjust_address (operands[1], DImode, 0);
     }
   else if (operands[1] == CONST0_RTX (TFmode))
     operands[2] = operands[3] = const0_rtx;
@@ -2413,9 +2412,8 @@ alpha_split_tfmode_pair (operands)
     }
   else if (GET_CODE (operands[0]) == MEM)
     {
-      operands[1] = change_address (operands[0], DImode,
-				    plus_constant (XEXP (operands[0], 0), 8));
-      operands[0] = change_address (operands[0], DImode, NULL_RTX);
+      operands[1] = adjust_address (operands[0], DImode, 8);
+      operands[0] = adjust_address (operands[0], DImode, 0);
     }
   else
     abort ();
@@ -2694,8 +2692,7 @@ alpha_expand_unaligned_load_words (out_regs, smem, words, ofs)
   data_regs[words] = gen_reg_rtx (DImode);
 
   if (ofs != 0)
-    smem = change_address (smem, GET_MODE (smem),
-			   plus_constant (XEXP (smem, 0), ofs));
+    smem = adjust_address (smem, GET_MODE (smem), ofs);
   
   /* Load up all of the source data.  */
   for (i = 0; i < words; ++i)
@@ -2771,9 +2768,7 @@ alpha_expand_unaligned_store_words (data_regs, dmem, words, ofs)
   st_tmp_2 = gen_reg_rtx(DImode);
   
   if (ofs != 0)
-    dmem = change_address (dmem, GET_MODE (dmem),
-			   plus_constant (XEXP (dmem, 0), ofs));
-  
+    dmem = adjust_address (dmem, GET_MODE (dmem), ofs);
 
   st_addr_2 = change_address (dmem, DImode,
 			      gen_rtx_AND (DImode,
@@ -2950,9 +2945,7 @@ alpha_expand_block_move (operands)
 
       for (i = 0; i < words; ++i)
 	emit_move_insn (data_regs[nregs + i],
-			change_address (orig_src, DImode,
-					plus_constant (XEXP (orig_src, 0), 
-						       ofs + i * 8)));
+			adjust_address (orig_src, DImode, ofs + i * 8));
 
       nregs += words;
       bytes -= words * 8;
@@ -3006,10 +2999,7 @@ alpha_expand_block_move (operands)
 	{
 	  do {
 	    data_regs[nregs++] = tmp = gen_reg_rtx (HImode);
-	    emit_move_insn (tmp,
-			    change_address (orig_src, HImode,
-					    plus_constant (XEXP (orig_src, 0),
-							   ofs)));
+	    emit_move_insn (tmp, adjust_address (orig_src, HImode, ofs));
 	    bytes -= 2;
 	    ofs += 2;
 	  } while (bytes >= 2);
@@ -3026,10 +3016,7 @@ alpha_expand_block_move (operands)
   while (bytes > 0)
     {
       data_regs[nregs++] = tmp = gen_reg_rtx (QImode);
-      emit_move_insn (tmp,
-		      change_address (orig_src, QImode,
-				      plus_constant (XEXP (orig_src, 0),
-						     ofs)));
+      emit_move_insn (tmp, adjust_address (orig_src, QImode, ofs));
       bytes -= 1;
       ofs += 1;
     }
@@ -3099,9 +3086,7 @@ alpha_expand_block_move (operands)
     {
       while (i < nregs && GET_MODE (data_regs[i]) == DImode)
 	{
-	  emit_move_insn (change_address (orig_dst, DImode,
-					  plus_constant (XEXP (orig_dst, 0),
-							 ofs)),
+	  emit_move_insn (adjust_address (orig_dst, DImode, ofs),
 			  data_regs[i]);
 	  ofs += 8;
 	  i++;
@@ -3117,13 +3102,9 @@ alpha_expand_block_move (operands)
 	  tmp = expand_binop (DImode, lshr_optab, data_regs[i], GEN_INT (32),
 			      NULL_RTX, 1, OPTAB_WIDEN);
 
-	  emit_move_insn (change_address (orig_dst, SImode,
-					  plus_constant (XEXP (orig_dst, 0),
-							 ofs)),
+	  emit_move_insn (adjust_address (orig_dst, SImode, ofs),
 			  gen_lowpart (SImode, data_regs[i]));
-	  emit_move_insn (change_address (orig_dst, SImode,
-					  plus_constant (XEXP (orig_dst, 0),
-							 ofs + 4)),
+	  emit_move_insn (adjust_address (orig_dst, SImode, ofs + 4),
 			  gen_lowpart (SImode, tmp));
 	  ofs += 8;
 	  i++;
@@ -3131,9 +3112,7 @@ alpha_expand_block_move (operands)
 
       while (i < nregs && GET_MODE (data_regs[i]) == SImode)
 	{
-	  emit_move_insn (change_address(orig_dst, SImode,
-					 plus_constant (XEXP (orig_dst, 0),
-							ofs)),
+	  emit_move_insn (adjust_address (orig_dst, SImode, ofs),
 			  data_regs[i]);
 	  ofs += 4;
 	  i++;
@@ -3171,10 +3150,7 @@ alpha_expand_block_move (operands)
   if (dst_align >= 16)
     while (i < nregs && GET_MODE (data_regs[i]) == HImode)
       {
-	emit_move_insn (change_address (orig_dst, HImode,
-					plus_constant (XEXP (orig_dst, 0),
-						       ofs)),
-			data_regs[i]);
+	emit_move_insn (adjust_address (orig_dst, HImode, ofs), data_regs[i]);
 	i++;
 	ofs += 2;
       }
@@ -3188,10 +3164,7 @@ alpha_expand_block_move (operands)
 
   while (i < nregs && GET_MODE (data_regs[i]) == QImode)
     {
-      emit_move_insn (change_address (orig_dst, QImode,
-				      plus_constant (XEXP (orig_dst, 0),
-						     ofs)),
-		      data_regs[i]);
+      emit_move_insn (adjust_address (orig_dst, QImode, ofs), data_regs[i]);
       i++;
       ofs += 1;
     }
@@ -3278,9 +3251,7 @@ alpha_expand_block_clear (operands)
 	  rtx mem, tmp;
 	  HOST_WIDE_INT mask;
 
-	  mem = change_address (orig_dst, mode,
-				plus_constant (XEXP (orig_dst, 0),
-					       ofs - inv_alignofs));
+	  mem = adjust_address (orig_dst, mode, ofs - inv_alignofs);
 	  MEM_ALIAS_SET (mem) = 0;
 
 	  mask = ~(~(HOST_WIDE_INT)0 << (inv_alignofs * 8));
@@ -3306,30 +3277,21 @@ alpha_expand_block_clear (operands)
 
       if (TARGET_BWX && (alignofs & 1) && bytes >= 1)
 	{
-	  emit_move_insn (change_address (orig_dst, QImode,
-					  plus_constant (XEXP (orig_dst, 0),
-						         ofs)),
-			  const0_rtx);
+	  emit_move_insn (adjust_address (orig_dst, QImode, ofs), const0_rtx);
 	  bytes -= 1;
 	  ofs += 1;
 	  alignofs -= 1;
 	}
       if (TARGET_BWX && align >= 16 && (alignofs & 3) == 2 && bytes >= 2)
 	{
-	  emit_move_insn (change_address (orig_dst, HImode,
-					  plus_constant (XEXP (orig_dst, 0),
-						         ofs)),
-			  const0_rtx);
+	  emit_move_insn (adjust_address (orig_dst, HImode, ofs), const0_rtx);
 	  bytes -= 2;
 	  ofs += 2;
 	  alignofs -= 2;
 	}
       if (alignofs == 4 && bytes >= 4)
 	{
-	  emit_move_insn (change_address (orig_dst, SImode,
-					  plus_constant (XEXP (orig_dst, 0),
-						         ofs)),
-			  const0_rtx);
+	  emit_move_insn (adjust_address (orig_dst, SImode, ofs), const0_rtx);
 	  bytes -= 4;
 	  ofs += 4;
 	  alignofs = 0;
@@ -3351,10 +3313,8 @@ alpha_expand_block_clear (operands)
       words = bytes / 8;
 
       for (i = 0; i < words; ++i)
-	emit_move_insn (change_address(orig_dst, DImode,
-				       plus_constant (XEXP (orig_dst, 0),
-						      ofs + i * 8)),
-			  const0_rtx);
+	emit_move_insn (adjust_address(orig_dst, DImode, ofs + i * 8),
+			const0_rtx);
 
       bytes -= words * 8;
       ofs += words * 8;
@@ -3365,9 +3325,7 @@ alpha_expand_block_clear (operands)
 
   if (align >= 32 && bytes > 16)
     {
-      emit_move_insn (change_address (orig_dst, SImode,
-				      plus_constant (XEXP (orig_dst, 0), ofs)),
-		      const0_rtx);
+      emit_move_insn (adjust_address (orig_dst, SImode, ofs), const0_rtx);
       bytes -= 4;
       ofs += 4;
 
@@ -3400,9 +3358,7 @@ alpha_expand_block_clear (operands)
       words = bytes / 4;
 
       for (i = 0; i < words; ++i)
-	emit_move_insn (change_address (orig_dst, SImode,
-					plus_constant (XEXP (orig_dst, 0),
-						       ofs + i * 4)),
+	emit_move_insn (adjust_address (orig_dst, SImode, ofs + i * 4),
 			const0_rtx);
 
       bytes -= words * 4;
@@ -3440,8 +3396,7 @@ alpha_expand_block_clear (operands)
 	  rtx mem, tmp;
 	  HOST_WIDE_INT mask;
 
-	  mem = change_address (orig_dst, DImode,
-				plus_constant (XEXP (orig_dst, 0), ofs));
+	  mem = adjust_address (orig_dst, DImode, ofs);
 	  MEM_ALIAS_SET (mem) = 0;
 
 	  mask = ~(HOST_WIDE_INT)0 << (bytes * 8);
@@ -3457,8 +3412,7 @@ alpha_expand_block_clear (operands)
 	  rtx mem, tmp;
 	  HOST_WIDE_INT mask;
 
-	  mem = change_address (orig_dst, SImode,
-				plus_constant (XEXP (orig_dst, 0), ofs));
+	  mem = adjust_address (orig_dst, SImode, ofs);
 	  MEM_ALIAS_SET (mem) = 0;
 
 	  mask = ~(HOST_WIDE_INT)0 << (bytes * 8);
@@ -3484,9 +3438,7 @@ alpha_expand_block_clear (operands)
       if (align >= 16)
 	{
 	  do {
-	    emit_move_insn (change_address (orig_dst, HImode,
-					    plus_constant (XEXP (orig_dst, 0),
-							   ofs)),
+	    emit_move_insn (adjust_address (orig_dst, HImode, ofs),
 			    const0_rtx);
 	    bytes -= 2;
 	    ofs += 2;
@@ -3502,10 +3454,7 @@ alpha_expand_block_clear (operands)
 
   while (bytes > 0)
     {
-      emit_move_insn (change_address (orig_dst, QImode,
-				      plus_constant (XEXP (orig_dst, 0),
-						     ofs)),
-		      const0_rtx);
+      emit_move_insn (adjust_address (orig_dst, QImode, ofs), const0_rtx);
       bytes -= 1;
       ofs += 1;
     }
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 17c40b0..663877d 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -4291,7 +4291,7 @@
 
     operands[4] = change_address (operands[1], QImode,
 				  plus_constant (addr, 1));
-    operands[1] = change_address (operands[1], QImode, NULL_RTX);
+    operands[1] = adjust_address (operands[1], QImode, 0);
     operands[3] = gen_lowpart (QImode, operands[0]);
     operands[0] = gen_lowpart (SImode, operands[0]);
     operands[2] = gen_reg_rtx (SImode); 
@@ -4315,7 +4315,7 @@
 
     operands[4] = change_address (operands[1], QImode,
 				  plus_constant (addr, 1));
-    operands[1] = change_address (operands[1], QImode, NULL_RTX);
+    operands[1] = adjust_address (operands[1], QImode, 0);
     operands[3] = gen_lowpart (QImode, operands[0]);
     operands[0] = gen_lowpart (SImode, operands[0]);
     operands[2] = gen_reg_rtx (SImode);
@@ -4364,7 +4364,7 @@
 
     operands[3] = change_address (operands[0], QImode,
 				  plus_constant (addr, 1));
-    operands[0] = change_address (operands[0], QImode, NULL_RTX);
+    operands[0] = adjust_address (operands[0], QImode, 0);
   }"
 )
 
diff --git a/gcc/config/convex/convex.c b/gcc/config/convex/convex.c
index 8589fb4..eecf2bd 100644
--- a/gcc/config/convex/convex.c
+++ b/gcc/config/convex/convex.c
@@ -1,6 +1,6 @@
 /* Subroutines for insn-output.c for Convex.
-   Copyright (C) 1988, 1993, 1994, 1997, 1998,
-   1999, 2000 Free Software Foundation, Inc.
+   Copyright (C) 1988, 1993, 1994, 1997, 1998, 1999, 2000, 2001
+   Free Software Foundation, Inc.
 
 This file is part of GNU CC.
 
@@ -369,8 +369,10 @@ expand_movstr (operands)
 
       /* Get src and dest in the right mode */
       if (GET_MODE (src) != mode)
-	src = change_address (src, mode, 0),
-	dest = change_address (dest, mode, 0);
+	{
+	  src = adjust_address (src, mode, 0);
+	  dest = adjust_address (dest, mode, 0);
+	}
 
       /* Make load and store patterns for this piece */
       load = gen_rtx_SET (VOIDmode, reg, src);
diff --git a/gcc/config/dsp16xx/dsp16xx.md b/gcc/config/dsp16xx/dsp16xx.md
index 4c65a89..2d821b5 100644
--- a/gcc/config/dsp16xx/dsp16xx.md
+++ b/gcc/config/dsp16xx/dsp16xx.md
@@ -1467,7 +1467,7 @@
 	    rtx stack_slot;
 	    
 	    stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
-	    stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
+	    stack_slot = validize_mem (stack_slot);
 	    emit_move_insn (stack_slot, operands[2]);
 	    operands[2] = stack_slot;
 	  }
@@ -1592,7 +1592,7 @@
 	      rtx stack_slot;
 	    
 	      stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
-	      stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
+	      stack_slot = validize_mem (stack_slot);
 	      emit_move_insn (stack_slot, operands[2]);
 	      operands[2] = stack_slot;
 	    }
@@ -1729,16 +1729,18 @@
 	emit_barrier ();
 	emit_label (label1);
 
-	if (GET_CODE(operands[2]) != MEM)
+	if (GET_CODE (operands[2]) != MEM)
 	  {
 	    rtx stack_slot;
 	    
 	    stack_slot = assign_stack_temp (QImode, GET_MODE_SIZE(QImode), 0);
-	    stack_slot = change_address (stack_slot, VOIDmode, XEXP (stack_slot, 0));
+	    stack_slot = validize_mem (stack_slot);
 	    emit_move_insn (stack_slot, operands[2]);
 	    operands[2] = stack_slot;
 	  }
-	emit_insn (gen_match_ashlhi3_nobmu (operands[0], operands[1], operands[2]));
+
+	emit_insn (gen_match_ashlhi3_nobmu (operands[0], operands[1],
+					    operands[2]));
 	emit_label (label2);
 	DONE;
 #endif
diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c
index 51a5c26..0c18c65 100644
--- a/gcc/config/fr30/fr30.c
+++ b/gcc/config/fr30/fr30.c
@@ -1,7 +1,5 @@
-/*{{{  Introduction */ 
-
 /* FR30 specific functions.
-   Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
+   Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
    Contributed by Cygnus Solutions.
 
 This file is part of GNU CC.
@@ -1008,9 +1006,12 @@ fr30_move_double (operands)
 
 	  if (reverse)
 	    {
-	      emit_insn (gen_rtx_SET (VOIDmode, dest1, change_address (src, SImode, addr)));
-	      emit_insn (gen_rtx_SET (SImode, dest0, gen_rtx_REG (SImode, REGNO (addr))));
-	      emit_insn (gen_rtx_SET (SImode, dest0, plus_constant (dest0, UNITS_PER_WORD)));
+	      emit_insn (gen_rtx_SET (VOIDmode, dest1,
+				      change_address (src, SImode, addr)));
+	      emit_insn (gen_rtx_SET (SImode, dest0,
+				      gen_rtx_REG (SImode, REGNO (addr))));
+	      emit_insn (gen_rtx_SET (SImode, dest0,
+				      plus_constant (dest0, UNITS_PER_WORD)));
 
 	      new_mem = gen_rtx_MEM (SImode, dest0);
 	      MEM_COPY_ATTRIBUTES (new_mem, src);
@@ -1019,9 +1020,12 @@ fr30_move_double (operands)
 	    }
 	  else
 	    {
-	      emit_insn (gen_rtx_SET (VOIDmode, dest0, change_address (src, SImode, addr)));
-	      emit_insn (gen_rtx_SET (SImode, dest1, gen_rtx_REG (SImode, REGNO (addr))));
-	      emit_insn (gen_rtx_SET (SImode, dest1, plus_constant (dest1, UNITS_PER_WORD)));
+	      emit_insn (gen_rtx_SET (VOIDmode, dest0,
+				      change_address (src, SImode, addr)));
+	      emit_insn (gen_rtx_SET (SImode, dest1,
+				      gen_rtx_REG (SImode, REGNO (addr))));
+	      emit_insn (gen_rtx_SET (SImode, dest1,
+				      plus_constant (dest1, UNITS_PER_WORD)));
 
 	      new_mem = gen_rtx_MEM (SImode, dest1);
 	      MEM_COPY_ATTRIBUTES (new_mem, src);
@@ -1054,12 +1058,15 @@ fr30_move_double (operands)
       src0 = operand_subword (src, 0, TRUE, mode);
       src1 = operand_subword (src, 1, TRUE, mode);
       
-      emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, addr), src0));
-
-      if (REGNO (addr) == STACK_POINTER_REGNUM)
-	emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, plus_constant (stack_pointer_rtx, UNITS_PER_WORD)), src1));
-      else if (REGNO (addr) == FRAME_POINTER_REGNUM)
-	emit_insn (gen_rtx_SET (VOIDmode, change_address (dest, SImode, plus_constant (frame_pointer_rtx, UNITS_PER_WORD)), src1));
+      emit_insn (gen_rtx_SET (VOIDmode,
+			      change_address (dest, SImode, addr),
+			      src0));
+
+      if (REGNO (addr) == STACK_POINTER_REGNUM
+	  || REGNO (addr) == FRAME_POINTER_REGNUM)
+	emit_insn (gen_rtx_SET (VOIDmode,
+				adjust_address (dest, SImode, UNITS_PER_WORD),
+				src1));
       else
 	{
 	  rtx new_mem;
@@ -1087,10 +1094,3 @@ fr30_move_double (operands)
 
   return val;
 }
-
-/*}}}*/
-
-/* Local Variables: */
-/* folded-file: t   */
-/* End:		    */
-
diff --git a/gcc/config/fr30/fr30.md b/gcc/config/fr30/fr30.md
index 296cdb2..d7e6115 100644
--- a/gcc/config/fr30/fr30.md
+++ b/gcc/config/fr30/fr30.md
@@ -1,5 +1,3 @@
-;;{{{ Comment 
-
 ;; FR30 machine description.
 ;; Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
 ;; Contributed by Cygnus Solutions.
@@ -1441,5 +1439,3 @@
 ;; mode: md
 ;; folded-file: t
 ;; End:
-
-;;}}} 
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b4aab6b..78bf5ed 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -4408,9 +4408,9 @@ split_di (operands, num, lo_half, hi_half)
 	}
       else if (offsettable_memref_p (op))
 	{
-	  rtx lo_addr = XEXP (op, 0);
 	  rtx hi_addr = XEXP (adj_offsettable_operand (op, 4), 0);
-	  lo_half[num] = change_address (op, SImode, lo_addr);
+
+	  lo_half[num] = adjust_address (op, SImode, 0);
 	  hi_half[num] = change_address (op, SImode, hi_addr);
 	}
       else
@@ -6865,7 +6865,7 @@ ix86_split_to_parts (operand, parts, mode)
 	    }
 	  else if (offsettable_memref_p (operand))
 	    {
-	      operand = change_address (operand, SImode, XEXP (operand, 0));
+	      operand = adjust_address (operand, SImode, 0);
 	      parts[0] = operand;
 	      parts[1] = adj_offsettable_operand (operand, 4);
 	      if (size == 3)
@@ -7061,7 +7061,7 @@ ix86_split_long_move (operands)
 	  if (GET_MODE (part[1][1]) == SImode)
 	    {
 	      if (GET_CODE (part[1][1]) == MEM)
-		part[1][1] = change_address (part[1][1], DImode, XEXP (part[1][1], 0));
+		part[1][1] = adjust_address (part[1][1], DImode, 0);
 	      else if (REG_P (part[1][1]))
 		part[1][1] = gen_rtx_REG (DImode, REGNO (part[1][1]));
 	      else
@@ -10185,17 +10185,16 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore)
     case IX86_BUILTIN_SETPS1:
       target = assign_386_stack_local (SFmode, 0);
       arg0 = TREE_VALUE (arglist);
-      emit_move_insn (change_address (target, SFmode, XEXP (target, 0)),
+      emit_move_insn (adjust_address (target, SFmode, 0),
 		      expand_expr (arg0, NULL_RTX, VOIDmode, 0));
       op0 = gen_reg_rtx (V4SFmode);
-      emit_insn (gen_sse_loadss (op0, change_address (target, V4SFmode,
-						      XEXP (target, 0))));
+      emit_insn (gen_sse_loadss (op0, adjust_address (target, V4SFmode, 0)));
       emit_insn (gen_sse_shufps (op0, op0, op0, GEN_INT (0)));
       return op0;
 
     case IX86_BUILTIN_SETPS:
       target = assign_386_stack_local (V4SFmode, 0);
-      op0 = change_address (target, SFmode, XEXP (target, 0));
+      op0 = adjust_address (target, SFmode, 0);
       arg0 = TREE_VALUE (arglist);
       arg1 = TREE_VALUE (TREE_CHAIN (arglist));
       arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index e788849..c460ef6 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8059,7 +8059,7 @@
       if (! MEM_VOLATILE_P (operands[0]))
 	{
 	  mode = smallest_mode_for_size (pos + len, MODE_INT);
-	  operands[0] = change_address (operands[0], mode, NULL_RTX);
+	  operands[0] = adjust_address (operands[0], mode, 0);
 	}
     }
   else if (mode == HImode && pos + len <= 8)
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index c503a67..11a21a5 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -928,11 +928,11 @@ ia64_split_timode (out, in, scratch)
 	switch (GET_CODE (base))
 	  {
 	  case REG:
-	    out[0] = change_address (in, DImode, NULL_RTX);
+	    out[0] = adjust_address (in, DImode, 0);
 	    break;
 	  case POST_MODIFY:
 	    base = XEXP (base, 0);
-	    out[0] = change_address (in, DImode, NULL_RTX);
+	    out[0] = adjust_address (in, DImode, 0);
 	    break;
 
 	  /* Since we're changing the mode, we need to change to POST_MODIFY
@@ -941,13 +941,17 @@ ia64_split_timode (out, in, scratch)
 	     register handy so let's use it.  */
 	  case POST_INC:
 	    base = XEXP (base, 0);
-	    out[0] = change_address (in, DImode,
-	      gen_rtx_POST_MODIFY (Pmode, base,plus_constant (base, 16)));
+	    out[0]
+	      = change_address (in, DImode,
+				gen_rtx_POST_MODIFY
+				(Pmode, base, plus_constant (base, 16)));
 	    break;
 	  case POST_DEC:
 	    base = XEXP (base, 0);
-	    out[0] = change_address (in, DImode,
-	      gen_rtx_POST_MODIFY (Pmode, base,plus_constant (base, -16)));
+	    out[0]
+	      = change_address (in, DImode,
+				gen_rtx_POST_MODIFY
+				(Pmode, base, plus_constant (base, -16)));
 	    break;
 	  default:
 	    abort ();
@@ -998,9 +1002,7 @@ spill_tfmode_operand (in, force)
     }
   else if (GET_CODE (in) == MEM
 	   && GET_CODE (XEXP (in, 0)) == ADDRESSOF)
-    {
-      return change_address (in, TFmode, copy_to_reg (XEXP (in, 0)));
-    }
+    return change_address (in, TFmode, copy_to_reg (XEXP (in, 0)));
   else
     return in;
 }
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index 7d30c3c..3a54dd5 100644
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -1,5 +1,5 @@
 ;; IA-64 Machine description template
-;; Copyright (C) 1999, 2000 Free Software Foundation, Inc.
+;; Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
 ;; Contributed by James E. Wilson <wilson@cygnus.com> and
 ;;		  David Mosberger <davidm@hpl.hp.com>.
 
@@ -725,11 +725,8 @@
 	  out[WORDS_BIG_ENDIAN] = gen_rtx_REG (DImode, REGNO (operands[0]));
 	  out[!WORDS_BIG_ENDIAN] = gen_rtx_REG (DImode, REGNO (operands[0])+1);
 
-	  emit_move_insn (out[0], change_address (operands[1], DImode, NULL));
-	  emit_move_insn (out[1],
-			  change_address (operands[1], DImode,
-					  plus_constant (XEXP (operands[1], 0),
-							 8)));
+	  emit_move_insn (out[0], adjust_address (operands[1], DImode, 0));
+	  emit_move_insn (out[1], adjust_address (operands[1], DImode, 8));
 	  DONE;
 	}
 
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index 6530435..ca213af 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -1,5 +1,6 @@
 /* Subroutines used for code generation on the Mitsubishi M32R cpu.
-   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
+   Free Software Foundation, Inc.
 
 This file is part of GNU CC.
 
@@ -1263,8 +1264,8 @@ gen_split_move_double (operands)
 	{
 	  /* If the high-address word is used in the address, we must load it
 	     last.  Otherwise, load it first.  */
-	  rtx addr = XEXP (src, 0);
-	  int reverse = (refers_to_regno_p (dregno, dregno+1, addr, 0) != 0);
+	  int reverse
+	    = (refers_to_regno_p (dregno, dregno + 1, XEXP (src, 0), 0) != 0);
 
 	  /* We used to optimize loads from single registers as
 
@@ -1279,15 +1280,13 @@ gen_split_move_double (operands)
 	     which saves 2 bytes and doesn't force longword alignment.  */
 	  emit_insn (gen_rtx_SET (VOIDmode,
 				  operand_subword (dest, reverse, TRUE, mode),
-				  change_address (src, SImode,
-						  plus_constant (addr,
-								 reverse * UNITS_PER_WORD))));
+				  adjust_address (src, SImode,
+						  reverse * UNITS_PER_WORD)));
 
 	  emit_insn (gen_rtx_SET (VOIDmode,
 				  operand_subword (dest, !reverse, TRUE, mode),
-				  change_address (src, SImode,
-						  plus_constant (addr,
-								 (!reverse) * UNITS_PER_WORD))));
+				  adjust_address (src, SImode,
+						  !reverse * UNITS_PER_WORD)));
 	}
 
       else
@@ -1308,15 +1307,12 @@ gen_split_move_double (operands)
      which saves 2 bytes and doesn't force longword alignment.  */
   else if (GET_CODE (dest) == MEM && GET_CODE (src) == REG)
     {
-      rtx addr = XEXP (dest, 0);
-
       emit_insn (gen_rtx_SET (VOIDmode,
-			      change_address (dest, SImode, addr),
+			      adjust_address (dest, SImode, 0),
 			      operand_subword (src, 0, TRUE, mode)));
 
       emit_insn (gen_rtx_SET (VOIDmode,
-			      change_address (dest, SImode,
-					      plus_constant (addr, UNITS_PER_WORD)),
+			      adjust_address (dest, SImode, UNITS_PER_WORD),
 			      operand_subword (src, 1, TRUE, mode)));
     }
 
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 4526520..a666876 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -1,5 +1,5 @@
 ;;- Machine description for GNU compiler, Motorola 68000 Version
-;;  Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999
+;;  Copyright (C) 1987, 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2001
 ;;  Free Software Foundation, Inc.
 
 ;; This file is part of GNU CC.
@@ -1255,8 +1255,7 @@
       operands[1] = force_const_mem (XFmode, operands[1]);
       if (! memory_address_p (XFmode, XEXP (operands[1], 0))
 	  && ! reload_in_progress)
-	operands[1] = change_address (operands[1], XFmode,
-				      XEXP (operands[1], 0));
+	operands[1] = adjust_address (operands[1], XFmode, 0);
     }
   if (flag_pic && TARGET_PCREL && ! reload_in_progress)
     {
diff --git a/gcc/config/m88k/m88k.c b/gcc/config/m88k/m88k.c
index 38c6c66..12313c9 100644
--- a/gcc/config/m88k/m88k.c
+++ b/gcc/config/m88k/m88k.c
@@ -1,6 +1,6 @@
 /* Subroutines for insn-output.c for Motorola 88000.
-   Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
-   Free Software Foundation, Inc. 
+   Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+   2001 Free Software Foundation, Inc. 
    Contributed by Michael Tiemann (tiemann@mcc.com)
    Currently maintained by (gcc@dg-rtp.dg.com)
 
@@ -2613,9 +2613,7 @@ m88k_builtin_saveregs ()
   /* Now store the incoming registers.  */
   if (fixed < 8)
     {
-      dest = change_address (addr, Pmode,
-			     plus_constant (XEXP (addr, 0),
-					    fixed * UNITS_PER_WORD));
+      dest = adjust_address (addr, Pmode, fixed * UNITS_PER_WORD);
       move_block_from_reg (2 + fixed, dest, 8 - fixed,
 			   UNITS_PER_WORD * (8 - fixed));
 
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index b01e484..950e38d 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -1,6 +1,6 @@
 ;;  Mips.md	     Machine Description for MIPS based processors
 ;;  Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-;;  1999, 2000 Free Software Foundation, Inc.
+;;  1999, 2000, 2001 Free Software Foundation, Inc.
 ;;  Contributed by   A. Lichnewsky, lich@inria.inria.fr
 ;;  Changes by       Michael Meissner, meissner@osf.org
 ;;  64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and
@@ -4542,7 +4542,7 @@ move\\t%0,%z4\\n\\
     FAIL;
 
   /* Change the mode to BLKmode for aliasing purposes.  */
-  operands[1] = change_address (operands[1], BLKmode, XEXP (operands[1], 0));
+  operands[1] = adjust_address (operands[1], BLKmode, 0);
 
   /* Otherwise, emit a l[wd]l/l[wd]r pair to load the value.  */
   if (INTVAL (operands[2]) == 64)
@@ -4590,7 +4590,7 @@ move\\t%0,%z4\\n\\
     FAIL;
 
   /* Change the mode to BLKmode for aliasing purposes.  */
-  operands[1] = change_address (operands[1], BLKmode, XEXP (operands[1], 0));
+  operands[1] = adjust_address (operands[1], BLKmode, 0);
 
   /* Otherwise, emit a lwl/lwr pair to load the value.  */
   if (INTVAL (operands[2]) == 64)
@@ -4638,7 +4638,7 @@ move\\t%0,%z4\\n\\
     FAIL;
 
   /* Change the mode to BLKmode for aliasing purposes.  */
-  operands[0] = change_address (operands[0], BLKmode, XEXP (operands[0], 0));
+  operands[0] = adjust_address (operands[0], BLKmode, 0);
 
   /* Otherwise, emit a s[wd]l/s[wd]r pair to load the value.  */
   if (INTVAL (operands[1]) == 64)
@@ -5069,7 +5069,7 @@ move\\t%0,%z4\\n\\
 	  rtx op1 = change_address (operands[1], VOIDmode, addr);
 
 	  scratch = gen_rtx_REG (SImode, REGNO (scratch));
-	  memword = change_address (op1, SImode, NULL_RTX);
+	  memword = adjust_address (op1, SImode, 0);
 	  offword = change_address (adj_offsettable_operand (op1, 4),
 				    SImode, NULL_RTX);
 	  if (BYTES_BIG_ENDIAN)
@@ -5149,7 +5149,7 @@ move\\t%0,%z4\\n\\
 	  rtx op0 = change_address (operands[0], VOIDmode, addr);
 
 	  scratch = gen_rtx_REG (SImode, REGNO (operands[2]));
-	  memword = change_address (op0, SImode, NULL_RTX);
+	  memword = adjust_address (op0, SImode, 0);
 	  offword = change_address (adj_offsettable_operand (op0, 4),
 				    SImode, NULL_RTX);
 	  if (BYTES_BIG_ENDIAN)
@@ -5679,7 +5679,7 @@ move\\t%0,%z4\\n\\
   /* We need to get the source in SFmode so that the insn is
      recognized.  */
   if (GET_CODE (operands[1]) == MEM)
-    source = change_address (operands[1], SFmode, NULL_RTX);
+    source = adjust_address (operands[1], SFmode, 0);
   else if (GET_CODE (operands[1]) == REG || GET_CODE (operands[1]) == SUBREG)
     source = gen_rtx_REG (SFmode, true_regnum (operands[1]));
   else
diff --git a/gcc/config/ns32k/ns32k.c b/gcc/config/ns32k/ns32k.c
index 22a4b49..f2d0fe6 100644
--- a/gcc/config/ns32k/ns32k.c
+++ b/gcc/config/ns32k/ns32k.c
@@ -1,5 +1,5 @@
 /* Subroutines for assembler code output on the NS32000.
-   Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000
+   Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
    Free Software Foundation, Inc.
 
 This file is part of GNU CC.
@@ -423,23 +423,13 @@ move_tail (operands, bytes, offset)
 {
   if (bytes & 2)
     {
-      rtx src, dest;
-      dest = change_address (operands[0], HImode,
-			    plus_constant (XEXP (operands[0], 0), offset));
-      src = change_address (operands[1], HImode,
-			   plus_constant (XEXP (operands[1], 0), offset));
-      emit_move_insn (dest, src);
+      emit_move_insn (adjust_address (operands[0], HImode, offset),
+		      adjust_address (operands[1], HImode, offset));
       offset += 2;
     }
   if (bytes & 1)
-    {
-      rtx src, dest;
-      dest = change_address (operands[0], QImode,
-			    plus_constant (XEXP (operands[0], 0), offset));
-      src = change_address (operands[1], QImode,
-			   plus_constant (XEXP (operands[1], 0), offset));
-      emit_move_insn (dest, src);
-    }
+    emit_move_insn (adjust_address (operands[0], QImode, offset),
+		    adjust_address (operands[1], QImode, offset));
 }
 
 void
@@ -461,20 +451,16 @@ expand_block_move (operands)
   if (constp && bytes < 20)
     {
       int words = bytes >> 2;
+
       if (words)
 	{
 	  if (words < 3 || flag_unroll_loops)
 	    {
 	      int offset = 0;
+
 	      for (; words; words--, offset += 4)
-		{
-		  rtx src, dest;
-		  dest = change_address (operands[0], SImode,
-					plus_constant (XEXP (operands[0], 0), offset));
-		  src = change_address (operands[1], SImode,
-				       plus_constant (XEXP (operands[1], 0), offset));
-		  emit_move_insn (dest, src);
-		}
+		emit_move_insn (adjust_address (operands[0], SImode, offset),
+				adjust_address (operands[1], SImode, offset));
 	    }
 	  else
 	    {
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 2ef989e..912be34 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1886,8 +1886,7 @@ rs6000_emit_move (dest, source, mode)
   if (GET_CODE (operands[1]) == MEM
       && ! memory_address_p (mode, XEXP (operands[1], 0))
       && ! reload_in_progress)
-    operands[1] = change_address (operands[1], mode,
-				  XEXP (operands[1], 0));
+    operands[1] = adjust_address (operands[1], mode, 0);
 
   emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
   return;
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index 5cdc209..0971078 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -4232,10 +4232,8 @@ sh_builtin_saveregs ()
      named args need not be saved.  */
   if (n_intregs > 0)
     move_block_from_reg (BASE_ARG_REG (SImode) + first_intreg,
-			 change_address (regbuf, BLKmode,
-					 plus_constant (XEXP (regbuf, 0),
-							(n_floatregs
-							 * UNITS_PER_WORD))), 
+			 adjust_address (regbuf, BLKmode,
+					 n_floatregs * UNITS_PER_WORD),
 			 n_intregs, n_intregs * UNITS_PER_WORD);
 
   /* Save float args.
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index d0a3f40..c688804 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -2957,7 +2957,7 @@
   [(clobber (const_int 0))]
   "
 {
-  rtx word0 = change_address (operands[1], SImode, NULL_RTX);
+  rtx word0 = adjust_address (operands[1], SImode, 0);
   rtx word1 = change_address (operands[1], SImode,
 			      plus_constant_for_output (XEXP (word0, 0), 4));
   rtx high_part = gen_highpart (SImode, operands[0]);
@@ -2985,7 +2985,7 @@
   [(clobber (const_int 0))]
   "
 {
-  rtx word0 = change_address (operands[0], SImode, NULL_RTX);
+  rtx word0 = adjust_address (operands[0], SImode, 0);
   rtx word1 = change_address (operands[0], SImode,
 			      plus_constant_for_output (XEXP (word0, 0), 4));
   rtx high_part = gen_highpart (SImode, operands[1]);
@@ -3594,7 +3594,7 @@
   [(clobber (const_int 0))]
   "
 {
-  rtx word0 = change_address (operands[1], SFmode, NULL_RTX);
+  rtx word0 = adjust_address (operands[1], SFmode, 0);
   rtx word1 = change_address (operands[1], SFmode,
 			      plus_constant_for_output (XEXP (word0, 0), 4));
 
@@ -3629,7 +3629,7 @@
   [(clobber (const_int 0))]
   "
 {
-  rtx word0 = change_address (operands[0], SFmode, NULL_RTX);
+  rtx word0 = adjust_address (operands[0], SFmode, 0);
   rtx word1 = change_address (operands[0], SFmode,
 			      plus_constant_for_output (XEXP (word0, 0), 4));
 
@@ -3655,7 +3655,7 @@
 {
   rtx dest1, dest2;
 
-  dest1 = change_address (operands[0], SFmode, NULL_RTX);
+  dest1 = adjust_address (operands[0], SFmode, 0);
   dest2 = change_address (operands[0], SFmode,
 			  plus_constant_for_output (XEXP (dest1, 0), 4));
   emit_insn (gen_movsf (dest1, CONST0_RTX (SFmode)));
@@ -3929,7 +3929,7 @@
       dest2 = gen_df_reg (set_dest, 1);
       break;
     case MEM:
-      dest1 = change_address (set_dest, DFmode, NULL_RTX);
+      dest1 = adjust_address (set_dest, DFmode, 0);
       dest2 = change_address (set_dest, DFmode,
 			      plus_constant_for_output (XEXP (dest1, 0), 8));
       break;
@@ -3950,7 +3950,7 @@
   [(clobber (const_int 0))]
   "
 {
-  rtx word0 = change_address (operands[1], DFmode, NULL_RTX);
+  rtx word0 = adjust_address (operands[1], DFmode, 0);
   rtx word1 = change_address (operands[1], DFmode,
 			      plus_constant_for_output (XEXP (word0, 0), 8));
   rtx set_dest, dest1, dest2;
@@ -3986,7 +3986,7 @@
   [(clobber (const_int 0))]
   "
 {
-  rtx word1 = change_address (operands[0], DFmode, NULL_RTX);
+  rtx word1 = adjust_address (operands[0], DFmode, 0);
   rtx word2 = change_address (operands[0], DFmode,
 			      plus_constant_for_output (XEXP (word1, 0), 8));
   rtx set_src;
@@ -8906,10 +8906,9 @@
     }
 
   /* Reload the function value registers.  */
-  emit_move_insn (valreg1, change_address (result, DImode, XEXP (result, 0)));
+  emit_move_insn (valreg1, adjust_address (result, DImode, 0));
   emit_move_insn (valreg2,
-		  change_address (result, TARGET_ARCH64 ? TFmode : DFmode,
-				  plus_constant (XEXP (result, 0), 8)));
+		  adjust_address (result, TARGET_ARCH64 ? TFmode : DFmode, 8));
 
   /* Put USE insns before the return.  */
   emit_insn (gen_rtx_USE (VOIDmode, valreg1));