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author | Vladimir Makarov <vmakarov@gcc.gnu.org> | 1999-01-19 12:03:01 +0000 |
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committer | Vladimir Makarov <vmakarov@gcc.gnu.org> | 1999-01-19 12:03:01 +0000 |
commit | eaa4b44cfc6743304718f03b61c8c3ef9ec91d0b (patch) | |
tree | ed369eff236e0ae27f442c15fba0966a72f573b4 /gcc/config | |
parent | 60409070a6daca63bbb2be39cefe8692e96ad952 (diff) | |
download | gcc-eaa4b44cfc6743304718f03b61c8c3ef9ec91d0b.zip gcc-eaa4b44cfc6743304718f03b61c8c3ef9ec91d0b.tar.gz gcc-eaa4b44cfc6743304718f03b61c8c3ef9ec91d0b.tar.bz2 |
[multiple changes]
1999-01-19 Vladimir N. Makarov <vmakarov@cygnus.com>
* invoke.texi (-mlong-double-64): New option description.
1999-01-19 Jim Wilson <wilson@cygnus.com>
* libgcc2.c: Change all uses of LONG_DOUBLE_TYPE_SIZE to
LIBGCC2_LONG_DOUBLE_TYPE_SIZE.
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): New. Set to LONG_DOUBLE_TYPE_SIZE
if not defined.
* i960/i960.h (MULTILIB_DEFAULTS): Define to mnumerics.
(CPP_SPECS): Add -mlong-double-64 support.
(TARGET_FLAG_LONG_DOUBLE_64, TARGET_LONG_DOUBLE_64): New.
(TARGET_SWITCHES): Add -mlong-double-64 support.
(LONG_DOUBLE_TYPE_SIZE): Likewise.
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Define.
* i960/vx960-coff.h (MULTILIB_DEFAULTS): Define to msoft-float.
(CPP_SPECS): Add -mlong-double-64 support.
* i960/t-960bare (MULTILIB_OPTIONS): Add mlong-double-64.
(MULTILIB_DIRNAMES): Add ld64.
* i960/t-vxworks960 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Likewise.
From-SVN: r24764
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/i960/i960.h | 24 | ||||
-rw-r--r-- | gcc/config/i960/t-960bare | 4 | ||||
-rw-r--r-- | gcc/config/i960/t-vxworks960 | 4 | ||||
-rw-r--r-- | gcc/config/i960/vx960-coff.h | 5 |
4 files changed, 29 insertions, 8 deletions
diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index 67b3dc7..f433b4c 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -24,6 +24,8 @@ Boston, MA 02111-1307, USA. */ /* Note that some other tm.h files may include this one and then override many of the definitions that relate to assembler syntax. */ +#define MULTILIB_DEFAULTS { "mnumerics" } + /* Names to predefine in the preprocessor for this target machine. */ #define CPP_PREDEFINES "-Di960 -Di80960 -DI960 -DI80960 -Acpu(i960) -Amachine(i960)" @@ -45,7 +47,8 @@ Boston, MA 02111-1307, USA. */ %{mcc:-D__i960CC__ -D__i960_CC__}\ %{mcf:-D__i960CF__ -D__i960_CF__}\ %{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:\ - %{!mcc:%{!mcf:-D__i960_KB -D__i960KB__ %{mic*:-D__i960KB}}}}}}}}}" + %{!mcc:%{!mcf:-D__i960_KB -D__i960KB__ %{mic*:-D__i960KB}}}}}}}}}\ + %{mlong-double-64:-D__LONG_DOUBLE_64__}" /* -mic* options make characters signed by default. */ /* Use #if rather than ?: because MIPS C compiler rejects ?: in @@ -209,6 +212,11 @@ extern int process_pragma (); #define TARGET_FLAG_OLD_ALIGN 0x8000 #define TARGET_OLD_ALIGN (target_flags & TARGET_FLAG_OLD_ALIGN) +/* Nonzero if long doubles are to be 64 bits. Useful for soft-float targets + if 80 bit long double support is missing. */ +#define TARGET_FLAG_LONG_DOUBLE_64 0x10000 +#define TARGET_LONG_DOUBLE_64 (target_flags & TARGET_FLAG_LONG_DOUBLE_64) + extern int target_flags; /* Macro to define tables used to set the flags. @@ -268,6 +276,7 @@ extern int target_flags; {"no-strict-align", -(TARGET_FLAG_STRICT_ALIGN)}, \ {"old-align", (TARGET_FLAG_OLD_ALIGN|TARGET_FLAG_STRICT_ALIGN)}, \ {"no-old-align", -(TARGET_FLAG_OLD_ALIGN|TARGET_FLAG_STRICT_ALIGN)}, \ + {"long-double-64", TARGET_FLAG_LONG_DOUBLE_64}, \ {"link-relax", 0}, \ {"no-link-relax", 0}, \ SUBTARGET_SWITCHES \ @@ -356,8 +365,17 @@ extern int target_flags; /* Width in bits of a pointer. See also the macro `Pmode' defined below. */ #define POINTER_SIZE 32 -/* Width in bits of a long double. Identical to double for now. */ -#define LONG_DOUBLE_TYPE_SIZE 64 +/* Width in bits of a long double. Define to 96, and let + ROUND_TYPE_ALIGN adjust the alignment for speed. */ +#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_64 ? 64 : 96) + +/* Define this to set long double type size to use in libgcc2.c, which can + not depend on target_flags. */ +#if defined(__LONG_DOUBLE_64__) +#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 +#else +#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 96 +#endif /* Allocation boundary (in *bits*) for storing pointers in memory. */ #define POINTER_BOUNDARY 32 diff --git a/gcc/config/i960/t-960bare b/gcc/config/i960/t-960bare index c6be2a0..37929bb 100644 --- a/gcc/config/i960/t-960bare +++ b/gcc/config/i960/t-960bare @@ -16,8 +16,8 @@ xp-bit.c: $(srcdir)/config/fp-bit.c echo '#define EXTENDED_FLOAT_STUBS' > xp-bit.c cat $(srcdir)/config/fp-bit.c >> xp-bit.c -MULTILIB_OPTIONS=mnumerics/msoft-float -MULTILIB_DIRNAMES=float soft-float +MULTILIB_OPTIONS=mnumerics/msoft-float mlong-double-64 +MULTILIB_DIRNAMES=float soft-float ld64 MULTILIB_MATCHES=mnumerics=msb mnumerics=msc mnumerics=mkb mnumerics=mkc mnumerics=mmc mnumerics=mcb mnumerics=mcc mnumerics=mjf msoft-float=msa msoft-float=mka msoft-float=mca msoft-float=mcf LIBGCC = stmp-multilib diff --git a/gcc/config/i960/t-vxworks960 b/gcc/config/i960/t-vxworks960 index c2dd5eb..851e7bd 100644 --- a/gcc/config/i960/t-vxworks960 +++ b/gcc/config/i960/t-vxworks960 @@ -19,8 +19,8 @@ xp-bit.c: $(srcdir)/config/fp-bit.c echo '#define EXTENDED_FLOAT_STUBS' > xp-bit.c cat $(srcdir)/config/fp-bit.c >> xp-bit.c -MULTILIB_OPTIONS=mnumerics/msoft-float -MULTILIB_DIRNAMES=float soft-float +MULTILIB_OPTIONS=mnumerics/msoft-float mlong-double-64 +MULTILIB_DIRNAMES=float soft-float ld64 MULTILIB_MATCHES=mnumerics=msb mnumerics=msc mnumerics=mkb mnumerics=mkc mnumerics=mmc mnumerics=mcb mnumerics=mcc msoft-float=msa msoft-float=mka msoft-float=mca msoft-float=mcf LIBGCC = stmp-multilib diff --git a/gcc/config/i960/vx960-coff.h b/gcc/config/i960/vx960-coff.h index b2e93fb..91879dd 100644 --- a/gcc/config/i960/vx960-coff.h +++ b/gcc/config/i960/vx960-coff.h @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ /* This file just exists to give specs for the 960 running on VxWorks. VxWorks does all the library stuff itself. */ +#define MULTILIB_DEFAULTS { "msoft-float" } + #undef LIB_SPEC #define LIB_SPEC "" @@ -57,7 +59,8 @@ Boston, MA 02111-1307, USA. */ %{mcf:-D__i960CF__ -D__i960_CF__}\ %{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:\ %{!mcc:%{!mcf:-D__i960_CA -D__i960CA__ -DCPU=I960CA\ - %{mic*:-D__i960CA}}}}}}}}}" + %{mic*:-D__i960CA}}}}}}}}}\ + %{mlong-double-64:-D__LONG_DOUBLE_64__}" /* Default to -mca. */ |