i386.h (PRINT_OPERAND_PUNCT_VALID_P): Add ';' code.

	* config/i386/i386.h (PRINT_OPERAND_PUNCT_VALID_P): Add ';' code.
	* config/i386/i386.c (print_operand): Handle ';' code.  Output
	semicolon for TARGET_MACHO.
	* config/i386/sync.md (*sync_compare_and_swap<mode>): Use '%;' to
	emit semicolon after 'lock' prefix.
	(sync_double_compare_and_swap<mode>): Ditto.
	(*sync_double_compare_and_swapdi_pic): Ditto.
	(*sync_compare_and_swap_cc<mode>): Ditto.
	(sync_double_compare_and_swap_cc<mode>): Ditto.
	(*sync_double_compare_and_swap_ccdi_pic): Ditto.
	(sync_old_add<mode>): Ditto.
	(sync_add<mode>): Ditto.
	(sync_sub<mode>): Ditto.
	(sync_ior<mode>): Ditto.
	(sync_and<mode>): Ditto.
	(sync_xor<mode>): Ditto.

From-SVN: r127728

3 files changed, 28 insertions, 17 deletions

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index e094efe..851d0a0 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -8495,6 +8495,8 @@ get_some_local_dynamic_name (void)
    X -- don't print any sort of PIC '@' suffix for a symbol.
    & -- print some in-use local-dynamic symbol name.
    H -- print a memory address offset by 8; used for sse high-parts
+   + -- print a branch hint as 'cs' or 'ds' prefix
+   ; -- print a semicolon (after prefixes due to bug in older gas).
  */
 
 void
@@ -8776,6 +8778,15 @@ print_operand (FILE *file, rtx x, int code)
 	      }
 	    return;
 	  }
+
+	case ';':
+#if TARGET_MACHO
+	  fputs (" ; ", file);
+#else
+	  fputc (' ', file);
+#endif
+	  return;
+
 	default:
 	    output_operand_lossage ("invalid operand code '%c'", code);
 	}
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 4a41a6c..471e342 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2229,7 +2229,7 @@ do {									\
    print_operand function.  */
 
 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
-  ((CODE) == '*' || (CODE) == '+' || (CODE) == '&')
+  ((CODE) == '*' || (CODE) == '+' || (CODE) == '&' || (CODE) == ';')
 
 #define PRINT_OPERAND(FILE, X, CODE)  \
   print_operand ((FILE), (X), (CODE))
diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
index 7530ab5..19295bb 100644
--- a/gcc/config/i386/sync.md
+++ b/gcc/config/i386/sync.md
@@ -81,7 +81,7 @@
 	  UNSPECV_CMPXCHG_1))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_CMPXCHG"
-  "lock cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
+  "lock{%;| } cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
 
 (define_insn "sync_double_compare_and_swap<mode>"
   [(set (match_operand:DCASMODE 0 "register_operand" "=A")
@@ -95,7 +95,7 @@
 	  UNSPECV_CMPXCHG_1))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock cmpxchg<doublemodesuffix>b\t%1")
+  "lock{%;| }cmpxchg<doublemodesuffix>b\t%1")
 
 ;; Theoretically we'd like to use constraint "r" (any reg) for operand
 ;; 3, but that includes ecx.  If operand 3 and 4 are the same (like when
@@ -118,7 +118,7 @@
 	  UNSPECV_CMPXCHG_1))
    (clobber (reg:CC FLAGS_REG))]
   "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic"
-  "xchg{l}\t%%ebx, %3\;lock cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
+  "xchg{l}\t%%ebx, %3\;lock{%;| }cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
 
 (define_expand "sync_compare_and_swap_cc<mode>"
   [(parallel
@@ -176,7 +176,7 @@
 	    [(match_dup 1) (match_dup 2) (match_dup 3)] UNSPECV_CMPXCHG_2)
 	  (match_dup 2)))]
   "TARGET_CMPXCHG"
-  "lock cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
+  "lock{%;| }cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
 
 (define_insn "sync_double_compare_and_swap_cc<mode>"
   [(set (match_operand:DCASMODE 0 "register_operand" "=A")
@@ -195,7 +195,7 @@
 	    UNSPECV_CMPXCHG_2)
 	  (match_dup 2)))]
   ""
-  "lock cmpxchg<doublemodesuffix>b\t%1")
+  "lock{%;| }cmpxchg<doublemodesuffix>b\t%1")
 
 ;; See above for the explanation of using the constraint "SD" for
 ;; operand 3.
@@ -216,7 +216,7 @@
 	    UNSPECV_CMPXCHG_2)
 	  (match_dup 2)))]
   "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic"
-  "xchg{l}\t%%ebx, %3\;lock cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
+  "xchg{l}\t%%ebx, %3\;lock{%;| }cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
 
 (define_insn "sync_old_add<mode>"
   [(set (match_operand:IMODE 0 "register_operand" "=<modeconstraint>")
@@ -227,7 +227,7 @@
 		    (match_operand:IMODE 2 "register_operand" "0")))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_XADD"
-  "lock xadd{<modesuffix>}\t{%0, %1|%1, %0}")
+  "lock{%;| }xadd{<modesuffix>}\t{%0, %1|%1, %0}")
 
 ;; Recall that xchg implicitly sets LOCK#, so adding it again wastes space.
 (define_insn "sync_lock_test_and_set<mode>"
@@ -251,12 +251,12 @@
   if (TARGET_USE_INCDEC)
     {
       if (operands[1] == const1_rtx)
-	return "lock inc{<modesuffix>}\t%0";
+	return "lock{%;| }inc{<modesuffix>}\t%0";
       if (operands[1] == constm1_rtx)
-	return "lock dec{<modesuffix>}\t%0";
+	return "lock{%;| }dec{<modesuffix>}\t%0";
     }
 
-  return "lock add{<modesuffix>}\t{%1, %0|%0, %1}";
+  return "lock{%;| }add{<modesuffix>}\t{%1, %0|%0, %1}";
 })
 
 (define_insn "sync_sub<mode>"
@@ -271,12 +271,12 @@
   if (TARGET_USE_INCDEC)
     {
       if (operands[1] == const1_rtx)
-	return "lock dec{<modesuffix>}\t%0";
+	return "lock{%;| }dec{<modesuffix>}\t%0";
       if (operands[1] == constm1_rtx)
-	return "lock inc{<modesuffix>}\t%0";
+	return "lock{%;| }inc{<modesuffix>}\t%0";
     }
 
-  return "lock sub{<modesuffix>}\t{%1, %0|%0, %1}";
+  return "lock{%;| }sub{<modesuffix>}\t{%1, %0|%0, %1}";
 })
 
 (define_insn "sync_ior<mode>"
@@ -287,7 +287,7 @@
 	  UNSPECV_LOCK))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock or{<modesuffix>}\t{%1, %0|%0, %1}")
+  "lock{%;| }or{<modesuffix>}\t{%1, %0|%0, %1}")
 
 (define_insn "sync_and<mode>"
   [(set (match_operand:IMODE 0 "memory_operand" "+m")
@@ -297,7 +297,7 @@
 	  UNSPECV_LOCK))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock and{<modesuffix>}\t{%1, %0|%0, %1}")
+  "lock{%;| }and{<modesuffix>}\t{%1, %0|%0, %1}")
 
 (define_insn "sync_xor<mode>"
   [(set (match_operand:IMODE 0 "memory_operand" "+m")
@@ -307,4 +307,4 @@
 	  UNSPECV_LOCK))
    (clobber (reg:CC FLAGS_REG))]
   ""
-  "lock xor{<modesuffix>}\t{%1, %0|%0, %1}")
+  "lock{%;| }xor{<modesuffix>}\t{%1, %0|%0, %1}")