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| author | Richard Sandiford <rsandifo@redhat.com> | 2004-06-25 06:59:03 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2004-06-25 06:59:03 +0000 |
| commit | bdb41add9deec358b0724347c73dd2d009ab7f36 (patch) | |
| tree | dbfcdfed71cfa5741798f5a8c7ed796652e749e4 /gcc/config | |
| parent | 3af5dcdb45192587bb3a338f299d7cc7e7f96125 (diff) | |
| download | gcc-bdb41add9deec358b0724347c73dd2d009ab7f36.zip gcc-bdb41add9deec358b0724347c73dd2d009ab7f36.tar.gz gcc-bdb41add9deec358b0724347c73dd2d009ab7f36.tar.bz2 | |
mips.c (reg_or_const_float_1_operand): Reimplement in terms of const_float_1_operand.
* config/mips/mips.c (reg_or_const_float_1_operand): Reimplement
in terms of const_float_1_operand.
From-SVN: r83640
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/mips/mips.c | 19 |
1 files changed, 3 insertions, 16 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index f481c4b..fe3e66d 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1428,26 +1428,13 @@ reg_or_0_operand (rtx op, enum machine_mode mode) } } -/* Accept a register or the floating point constant 1 in the appropriate mode. */ +/* Accept a register or the floating point constant 1 in the + appropriate mode. */ int reg_or_const_float_1_operand (rtx op, enum machine_mode mode) { - REAL_VALUE_TYPE d; - - switch (GET_CODE (op)) - { - case CONST_DOUBLE: - if (mode != GET_MODE (op) - || (mode != DFmode && mode != SFmode)) - return 0; - - REAL_VALUE_FROM_CONST_DOUBLE (d, op); - return REAL_VALUES_EQUAL (d, dconst1); - - default: - return register_operand (op, mode); - } + return const_float_1_operand (op, mode) || register_operand (op, mode); } /* Accept the floating point constant 1 in the appropriate mode. */ |