Remove CC0

This removes CC0 and all directly related infrastructure.

CC_STATUS, CC_STATUS_MDEP, CC_STATUS_MDEP_INIT, and NOTICE_UPDATE_CC
are deleted and poisoned.  CC0 is only deleted (some targets use that
name for something else).  HAVE_cc0 is automatically generated, and we
no longer will do that after this patch.

CC_STATUS_INIT is suggested in final.c to also be useful for ports that
are not CC0, and at least arm seems to use it for something.  So I am
leaving that alone, but most targets that have it could remove it.

2021-05-04  Segher Boessenkool  <segher@kernel.crashing.org>

	* caller-save.c: Remove CC0.
	* cfgcleanup.c: Remove CC0.
	* cfgrtl.c: Remove CC0.
	* combine.c: Remove CC0.
	* compare-elim.c: Remove CC0.
	* conditions.h: Remove CC0.
	* config/h8300/h8300.h: Remove CC0.
	* config/h8300/h8300-protos.h: Remove CC0.
	* config/h8300/peepholes.md: Remove CC0.
	* config/i386/x86-tune-sched.c: Remove CC0.
	* config/m68k/m68k.c: Remove CC0.
	* config/rl78/rl78.c: Remove CC0.
	* config/sparc/sparc.c: Remove CC0.
	* config/xtensa/xtensa.c: Remove CC0.
	(gen_conditional_move):  Use pc_rtx instead of cc0_rtx in a piece of
	RTL where that is used as a placeholder only.
	* cprop.c: Remove CC0.
	* cse.c: Remove CC0.
	* cselib.c: Remove CC0.
	* df-problems.c: Remove CC0.
	* df-scan.c: Remove CC0.
	* doc/md.texi: Remove CC0.  Adjust an example.
	* doc/rtl.texi: Remove CC0.  Adjust an example.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in: Remove CC0.
	* emit-rtl.c: Remove CC0.
	* final.c: Remove CC0.
	* fwprop.c: Remove CC0.
	* gcse-common.c: Remove CC0.
	* gcse.c: Remove CC0.
	* genattrtab.c: Remove CC0.
	* genconfig.c: Remove CC0.
	* genemit.c: Remove CC0.
	* genextract.c: Remove CC0.
	* gengenrtl.c: Remove CC0.
	* genrecog.c: Remove CC0.
	* haifa-sched.c: Remove CC0.
	* ifcvt.c: Remove CC0.
	* ira-costs.c: Remove CC0.
	* ira.c: Remove CC0.
	* jump.c: Remove CC0.
	* loop-invariant.c: Remove CC0.
	* lra-constraints.c: Remove CC0.
	* lra-eliminations.c: Remove CC0.
	* optabs.c: Remove CC0.
	* postreload-gcse.c: Remove CC0.
	* postreload.c: Remove CC0.
	* print-rtl.c: Remove CC0.
	* read-rtl-function.c: Remove CC0.
	* reg-notes.def: Remove CC0.
	* reg-stack.c: Remove CC0.
	* reginfo.c: Remove CC0.
	* regrename.c: Remove CC0.
	* reload.c: Remove CC0.
	* reload1.c: Remove CC0.
	* reorg.c: Remove CC0.
	* resource.c: Remove CC0.
	* rtl.c: Remove CC0.
	* rtl.def: Remove CC0.
	* rtl.h: Remove CC0.
	* rtlanal.c: Remove CC0.
	* sched-deps.c: Remove CC0.
	* sched-rgn.c: Remove CC0.
	* shrink-wrap.c: Remove CC0.
	* simplify-rtx.c: Remove CC0.
	* system.h: Remove CC0.  Poison NOTICE_UPDATE_CC, CC_STATUS_MDEP_INIT,
	CC_STATUS_MDEP, and CC_STATUS.
	* target.def: Remove CC0.
	* valtrack.c: Remove CC0.
	* var-tracking.c: Remove CC0.

8 files changed, 1 insertions, 961 deletions

diff --git a/gcc/config/h8300/h8300-protos.h b/gcc/config/h8300/h8300-protos.h
index c5667b3..45e7dec 100644
--- a/gcc/config/h8300/h8300-protos.h
+++ b/gcc/config/h8300/h8300-protos.h
@@ -36,7 +36,6 @@ extern const char *output_simode_bld (int, rtx[]);
 extern void final_prescan_insn (rtx_insn *, rtx *, int);
 extern int h8300_expand_movsi (rtx[]);
 extern machine_mode  h8300_select_cc_mode (RTX_CODE, rtx, rtx);
-extern void notice_update_cc (rtx, rtx_insn *);
 extern const char *output_logical_op (machine_mode, rtx *);
 extern unsigned int compute_logical_op_length (machine_mode,
 					       rtx *);
diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index b1fbcc5..ea60021 100644
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -569,13 +569,6 @@ struct cum_arg
 /* Here we define machine-dependent flags and fields in cc_status
    (see `conditions.h').  No extra ones are needed for the h8300.  */
 
-/* Store in cc_status the expressions
-   that the condition codes will describe
-   after execution of an instruction whose pattern is EXP.
-   Do not alter them if the instruction would not alter the cc's.  */
-
-#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN)
-
 /* The add insns don't set overflow in a usable way.  */
 #define CC_OVERFLOW_UNUSABLE 01000
 /* The mov,and,or,xor insns don't set carry.  That's OK though as the
diff --git a/gcc/config/h8300/peepholes.md b/gcc/config/h8300/peepholes.md
index bd69018..a836d7d 100644
--- a/gcc/config/h8300/peepholes.md
+++ b/gcc/config/h8300/peepholes.md
@@ -349,90 +349,6 @@
 		 (match_dup 1)))]
   "")
 
-;; Turn
-;;
-;;   subs   #1,er4
-;;   mov.w  r4,r4
-;;   bne    .L2028
-;;
-;; into
-;;
-;;   dec.w  #1,r4
-;;   bne    .L2028
-
-(define_peephole2
-  [(set (match_operand:HI 0 "register_operand" "")
-	(plus:HI (match_dup 0)
-		 (match_operand 1 "incdec_operand" "")))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  ""
-  [(set (match_operand:HI 0 "register_operand" "")
-	(unspec:HI [(match_dup 0)
-		    (match_dup 1)]
-		   UNSPEC_INCDEC))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))])
-
-;; The SImode version of the previous pattern.
-
-(define_peephole2
-  [(set (match_operand:SI 0 "register_operand" "")
-	(plus:SI (match_dup 0)
-		 (match_operand 1 "incdec_operand" "")))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  ""
-  [(set (match_operand:SI 0 "register_operand" "")
-	(unspec:SI [(match_dup 0)
-		    (match_dup 1)]
-		   UNSPEC_INCDEC))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))])
-
-(define_peephole2
-  [(parallel [(set (cc0)
-		   (compare (zero_extract:SI (match_operand:QI 0 "register_operand" "")
-					     (const_int 1)
-					     (const_int 7))
-			    (const_int 0)))
-	      (clobber (scratch:QI))])
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  ""
-  [(set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[4] = ((GET_CODE (operands[4]) == EQ)
-		   ? gen_rtx_GE (VOIDmode, cc0_rtx, const0_rtx)
-		   : gen_rtx_LT (VOIDmode, cc0_rtx, const0_rtx));
-  })
-
 ;; If a load of mem:SI is followed by an AND that turns off the upper
 ;; half, then we can load mem:HI instead.
 
@@ -456,829 +372,6 @@
     operands[4] = gen_lowpart (HImode, operands[1]);
   })
 
-;; (compare (reg:HI) (const_int)) takes 4 bytes, so we try to achieve
-;; the equivalent with shorter sequences.  Here is the summary.  Cases
-;; are grouped for each define_peephole2.
-;;
-;; reg  const_int                   use     insn
-;; --------------------------------------------------------
-;; dead    -2                       eq/ne   inc.l
-;; dead    -1                       eq/ne   inc.l
-;; dead     1                       eq/ne   dec.l
-;; dead     2                       eq/ne   dec.l
-;;
-;; dead     1                       ge/lt shar.l
-;; dead     3 (H8S)                 ge/lt shar.l
-;;
-;; dead     1                       geu/ltu shar.l
-;; dead     3 (H8S)                 geu/ltu shar.l
-;;
-;; ----   255                       ge/lt mov.b
-;;
-;; ----   255                       geu/ltu mov.b
-
-;; Transform
-;;
-;;	cmp.w	#1,r0
-;;	bne	.L1
-;;
-;; into
-;;
-;;	dec.w	#1,r0
-;;	bne	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:HI 0 "register_operand" "")
-		 (match_operand:HI 1 "incdec_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "INTVAL (operands[1]) != 0 && peep2_reg_dead_p (1, operands[0])"
-  [(set (match_dup 0)
-	(unspec:HI [(match_dup 0)
-		    (match_dup 5)]
-		   UNSPEC_INCDEC))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (- INTVAL (operands[1]));
-  })
-
-;; Transform
-;;
-;;	cmp.w	#1,r0
-;;	bgt	.L1
-;;
-;; into
-;;
-;;	shar.w	r0
-;;	bgt	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:HI 0 "register_operand" "")
-		 (match_operand:HI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "gtle_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == 1
-       || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
-  [(parallel [(set (match_dup 0)
-		   (ashiftrt:HI (match_dup 0)
-				(match_dup 5)))
-	      (clobber (scratch:QI))])
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 4)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
-  })
-
-;; Transform
-;;
-;;	cmp.w	#1,r0
-;;	bhi	.L1
-;;
-;; into
-;;
-;;	shar.w	r0
-;;	bne	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:HI 0 "register_operand" "")
-		 (match_operand:HI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "gtuleu_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == 1
-       || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
-  [(parallel [(set (match_dup 0)
-		   (ashiftrt:HI (match_dup 0)
-				(match_dup 5)))
-	      (clobber (scratch:QI))])
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 6)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
-    operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == GTU ? NE : EQ,
-				  VOIDmode, cc0_rtx, const0_rtx);
-  })
-
-;; Transform
-;;
-;;	cmp.w	#255,r0
-;;	bgt	.L1
-;;
-;; into
-;;
-;;	mov.b	r0h,r0h
-;;	bgt	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:HI 0 "register_operand" "")
-		 (const_int 255)))
-   (set (pc)
-	(if_then_else (match_operator 1 "gtle_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  ""
-  [(set (cc0) (compare (and:HI (match_dup 0)
-			       (const_int -256))
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 1)
-		      (match_dup 2)
-		      (match_dup 3)))])
-
-;; Transform
-;;
-;;	cmp.w	#255,r0
-;;	bhi	.L1
-;;
-;; into
-;;
-;;	mov.b	r0h,r0h
-;;	bne	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:HI 0 "register_operand" "")
-		 (const_int 255)))
-   (set (pc)
-	(if_then_else (match_operator 1 "gtuleu_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  ""
-  [(set (cc0) (compare (and:HI (match_dup 0)
-			       (const_int -256))
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 4)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == GTU ? NE : EQ,
-				  VOIDmode, cc0_rtx, const0_rtx);
-  })
-
-;; (compare (reg:SI) (const_int)) takes 6 bytes, so we try to achieve
-;; the equivalent with shorter sequences.  Here is the summary.  Cases
-;; are grouped for each define_peephole2.
-;;
-;; reg  const_int                   use     insn
-;; --------------------------------------------------------
-;; live    -2                       eq/ne   copy and inc.l
-;; live    -1                       eq/ne   copy and inc.l
-;; live     1                       eq/ne   copy and dec.l
-;; live     2                       eq/ne   copy and dec.l
-;;
-;; dead    -2                       eq/ne   inc.l
-;; dead    -1                       eq/ne   inc.l
-;; dead     1                       eq/ne   dec.l
-;; dead     2                       eq/ne   dec.l
-;;
-;; dead -131072                     eq/ne   inc.w and test
-;; dead  -65536                     eq/ne   inc.w and test
-;; dead   65536                     eq/ne   dec.w and test
-;; dead  131072                     eq/ne   dec.w and test
-;;
-;; dead 0x000000?? except 1 and 2   eq/ne   xor.b and test
-;; dead 0x0000??00                  eq/ne   xor.b and test
-;; dead 0x0000ffff                  eq/ne   not.w and test
-;;
-;; dead 0xffffff?? except -1 and -2 eq/ne   xor.b and not.l
-;; dead 0xffff??ff                  eq/ne   xor.b and not.l
-;; dead 0x40000000 (H8S)            eq/ne   rotl.l and dec.l
-;; dead 0x80000000                  eq/ne   rotl.l and dec.l
-;;
-;; live     1                       ge/lt copy and shar.l
-;; live     3 (H8S)                 ge/lt copy and shar.l
-;;
-;; live     1                       geu/ltu copy and shar.l
-;; live     3 (H8S)                 geu/ltu copy and shar.l
-;;
-;; dead     1                       ge/lt shar.l
-;; dead     3 (H8S)                 ge/lt shar.l
-;;
-;; dead     1                       geu/ltu shar.l
-;; dead     3 (H8S)                 geu/ltu shar.l
-;;
-;; dead     3 (H8/300H)             ge/lt and.b and test
-;; dead     7                       ge/lt and.b and test
-;; dead    15                       ge/lt and.b and test
-;; dead    31                       ge/lt and.b and test
-;; dead    63                       ge/lt and.b and test
-;; dead   127                       ge/lt and.b and test
-;; dead   255                       ge/lt and.b and test
-;;
-;; dead     3 (H8/300H)             geu/ltu and.b and test
-;; dead     7                       geu/ltu and.b and test
-;; dead    15                       geu/ltu and.b and test
-;; dead    31                       geu/ltu and.b and test
-;; dead    63                       geu/ltu and.b and test
-;; dead   127                       geu/ltu and.b and test
-;; dead   255                       geu/ltu and.b and test
-;;
-;; ---- 65535                       ge/lt mov.w
-;;
-;; ---- 65535                       geu/ltu mov.w
-
-;; Transform
-;;
-;;	cmp.l	#1,er0
-;;	beq	.L1
-;;
-;; into
-;;
-;;	dec.l	#1,er0
-;;	beq	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "incdec_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "INTVAL (operands[1]) != 0 && peep2_reg_dead_p (1, operands[0])"
-  [(set (match_dup 0)
-	(unspec:SI [(match_dup 0)
-		    (match_dup 5)]
-		   UNSPEC_INCDEC))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (- INTVAL (operands[1]));
-  })
-
-;; Transform
-;;
-;;	cmp.l	#65536,er0
-;;	beq	.L1
-;;
-;; into
-;;
-;;	dec.l	#1,e0
-;;	beq	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == -131072
-       || INTVAL (operands[1]) == -65536
-       || INTVAL (operands[1]) == 65536
-       || INTVAL (operands[1]) == 131072)"
-  [(set (match_dup 0)
-	(plus:SI (match_dup 0)
-		 (match_dup 5)))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (- INTVAL (operands[1]));
-  })
-
-;; Transform
-;;
-;;	cmp.l	#100,er0
-;;	beq	.L1
-;;
-;; into
-;;
-;;	xor.b	#100,er0
-;;	mov.l	er0,er0
-;;	beq	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && ((INTVAL (operands[1]) & 0x00ff) == INTVAL (operands[1])
-       || (INTVAL (operands[1]) & 0xff00) == INTVAL (operands[1])
-       || INTVAL (operands[1]) == 0x0000ffff)
-   && INTVAL (operands[1]) != 0
-   && INTVAL (operands[1]) != 1
-   && INTVAL (operands[1]) != 2"
-  [(set (match_dup 0)
-	(xor:SI (match_dup 0)
-		(match_dup 1)))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))])
-
-;; Transform
-;;
-;;	cmp.l	#-100,er0
-;;	beq	.L1
-;;
-;; into
-;;
-;;	xor.b	#99,er0
-;;	not.l	er0
-;;	beq	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && ((INTVAL (operands[1]) | 0x00ff) == -1
-       || (INTVAL (operands[1]) | 0xff00) == -1)
-   && INTVAL (operands[1]) != -1
-   && INTVAL (operands[1]) != -2"
-  [(set (match_dup 0)
-	(xor:SI (match_dup 0)
-		(match_dup 5)))
-   (set (match_dup 0)
-	(not:SI (match_dup 0)))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (INTVAL (operands[1]) ^ -1);
-  })
-
-;; Transform
-;;
-;;	cmp.l	#-2147483648,er0
-;;	beq	.L1
-;;
-;; into
-;;
-;;	rotl.l	er0
-;;	dec.l	#1,er0
-;;	beq	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == -2147483647 - 1
-       || (TARGET_H8300S && INTVAL (operands[1]) == 1073741824))"
-  [(set (match_dup 0)
-	(rotate:SI (match_dup 0)
-		   (match_dup 5)))
-   (set (match_dup 0)
-	(unspec:SI [(match_dup 0)
-		    (const_int -1)]
-		   UNSPEC_INCDEC))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (INTVAL (operands[1]) == -2147483647 - 1 ? 1 : 2);
-  })
-
-;; Transform
-;;
-;;	cmp.l	#1,er0
-;;	bgt	.L1
-;;
-;; into
-;;
-;;	mov.l	er0,er1
-;;	shar.l	er1
-;;	bgt	.L1
-
-;; We avoid this transformation if we see more than one copy of the
-;; same compare insn immediately before this one.
-
-(define_peephole2
-  [(match_scratch:SI 5 "r")
-   (set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "gtle_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "!peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == 1
-       || (TARGET_H8300S && INTVAL (operands[1]) == 3))
-   && !same_cmp_preceding_p (insn)"
-  [(set (match_dup 5)
-	(match_dup 0))
-   (parallel [(set (match_dup 5)
-		   (ashiftrt:SI (match_dup 5)
-				(match_dup 6)))
-	      (clobber (scratch:QI))])
-   (set (cc0) (compare (match_dup 5)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 4)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[6] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
-  })
-
-;; Transform
-;;
-;;	cmp.l	#1,er0
-;;	bhi	.L1
-;;
-;; into
-;;
-;;	mov.l	er0,er1
-;;	shar.l	er1
-;;	bne	.L1
-
-;; We avoid this transformation if we see more than one copy of the
-;; same compare insn immediately before this one.
-
-(define_peephole2
-  [(match_scratch:SI 5 "r")
-   (set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "gtuleu_operator"
-		         [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "!peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == 1
-       || (TARGET_H8300S && INTVAL (operands[1]) == 3))
-   && !same_cmp_preceding_p (insn)"
-  [(set (match_dup 5)
-	(match_dup 0))
-   (parallel [(set (match_dup 5)
-		   (ashiftrt:SI (match_dup 5)
-				(match_dup 6)))
-	      (clobber (scratch:QI))])
-   (set (cc0) (compare (match_dup 5)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 7)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[6] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
-    operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == GTU ? NE : EQ,
-				  VOIDmode, cc0_rtx, const0_rtx);
-  })
-
-;; Transform
-;;
-;;	cmp.l	#1,er0
-;;	bgt	.L1
-;;
-;; into
-;;
-;;	shar.l	er0
-;;	bgt	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "gtle_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == 1
-       || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
-  [(parallel [(set (match_dup 0)
-		   (ashiftrt:SI (match_dup 0)
-				(match_dup 5)))
-	      (clobber (scratch:QI))])
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 4)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
-  })
-
-;; Transform
-;;
-;;	cmp.l	#1,er0
-;;	bhi	.L1
-;;
-;; into
-;;
-;;	shar.l	er0
-;;	bne	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "gtuleu_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == 1
-       || (TARGET_H8300S && INTVAL (operands[1]) == 3))"
-  [(parallel [(set (match_dup 0)
-		   (ashiftrt:SI (match_dup 0)
-				(match_dup 5)))
-	      (clobber (scratch:QI))])
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 6)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (exact_log2 (INTVAL (operands[1]) + 1));
-    operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == GTU ? NE : EQ,
-				  VOIDmode, cc0_rtx, const0_rtx);
-  })
-
-;; Transform
-;;
-;;	cmp.l	#15,er0
-;;	bgt	.L1
-;;
-;; into
-;;
-;;	and	#240,r0l
-;;	mov.l	er0,er0
-;;	bgt	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "gtle_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && (INTVAL (operands[1]) == 3
-       || INTVAL (operands[1]) == 7
-       || INTVAL (operands[1]) == 15
-       || INTVAL (operands[1]) == 31
-       || INTVAL (operands[1]) == 63
-       || INTVAL (operands[1]) == 127
-       || INTVAL (operands[1]) == 255)"
-  [(set (match_dup 0)
-	(and:SI (match_dup 0)
-		(match_dup 5)))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 4)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (~INTVAL (operands[1]));
-  })
-
-;; Transform
-;;
-;;	cmp.l	#15,er0
-;;	bhi	.L1
-;;
-;; into
-;;
-;;	and	#240,r0l
-;;	mov.l	er0,er0
-;;	bne	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "const_int_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "gtuleu_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "peep2_reg_dead_p (1, operands[0])
-   && ((TARGET_H8300H && INTVAL (operands[1]) == 3)
-	|| INTVAL (operands[1]) == 7
-	|| INTVAL (operands[1]) == 15
-	|| INTVAL (operands[1]) == 31
-	|| INTVAL (operands[1]) == 63
-	|| INTVAL (operands[1]) == 127
-	|| INTVAL (operands[1]) == 255)"
-  [(set (match_dup 0)
-	(and:SI (match_dup 0)
-		(match_dup 5)))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 6)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[5] = GEN_INT (~INTVAL (operands[1]));
-    operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == GTU ? NE : EQ,
-				  VOIDmode, cc0_rtx, const0_rtx);
-  })
-
-;; Transform
-;;
-;;	cmp.l	#65535,er0
-;;	bgt	.L1
-;;
-;; into
-;;
-;;	mov.l	e0,e0
-;;	bgt	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (const_int 65535)))
-   (set (pc)
-	(if_then_else (match_operator 1 "gtle_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  ""
-  [(set (cc0) (compare (and:SI (match_dup 0)
-			       (const_int -65536))
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 1)
-		      (match_dup 2)
-		      (match_dup 3)))])
-
-;; Transform
-;;
-;;	cmp.l	#65535,er0
-;;	bhi	.L1
-;;
-;; into
-;;
-;;	mov.l	e0,e0
-;;	bne	.L1
-
-(define_peephole2
-  [(set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (const_int 65535)))
-   (set (pc)
-	(if_then_else (match_operator 1 "gtuleu_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  ""
-  [(set (cc0) (compare (and:SI (match_dup 0)
-			       (const_int -65536))
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_dup 4)
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[1]) == GTU ? NE : EQ,
-				  VOIDmode, cc0_rtx, const0_rtx);
-  })
-
-;; Transform
-;;
-;;	cmp.l	#1,er0
-;;	beq	.L1
-;;
-;; into
-;;
-;;	mov.l	er0,er1
-;;	dec.l	#1,er1
-;;	beq	.L1
-
-;; We avoid this transformation if we see more than one copy of the
-;; same compare insn.
-
-(define_peephole2
-  [(match_scratch:SI 5 "r")
-   (set (cc0)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "incdec_operand" "")))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "INTVAL (operands[1]) != 0
-   && !peep2_reg_dead_p (1, operands[0])
-   && !same_cmp_following_p (insn)"
-  [(set (match_dup 5)
-	(match_dup 0))
-   (set (match_dup 5)
-	(unspec:SI [(match_dup 5)
-		    (match_dup 6)]
-		   UNSPEC_INCDEC))
-   (set (cc0) (compare (match_dup 5)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    operands[6] = GEN_INT (- INTVAL (operands[1]));
-  })
-
-;; Narrow the mode of testing if possible.
-
-(define_peephole2
-  [(set (match_operand:HSI 0 "register_operand" "")
-	(and:HSI (match_dup 0)
-		 (match_operand:HSI 1 "const_int_operand" "")))
-   (set (cc0) (compare (match_dup 0)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_operator 4 "eqne_operator"
-		       [(cc0) (const_int 0)])
-		      (match_operand 2 "pc_or_label_operand" "")
-		      (match_operand 3 "pc_or_label_operand" "")))]
-  "((const_int_qi_operand (operands[1], QImode)
-     || (GET_MODE (operands[0]) == SImode
-	 && const_int_hi_operand (operands[1], HImode)))
-    && peep2_reg_dead_p (2, operands[0]))"
-  [(set (match_dup 5) (match_dup 7))
-   (set (cc0) (compare (match_dup 5)
-		       (const_int 0)))
-   (set (pc)
-	(if_then_else (match_op_dup 4 [(cc0) (const_int 0)])
-		      (match_dup 2)
-		      (match_dup 3)))]
-  {
-    enum machine_mode mode;
-
-    mode = const_int_qi_operand (operands[1], QImode) ? QImode : HImode;
-    operands[5] = gen_rtx_REG (mode, REGNO (operands[0]));
-    operands[6] = gen_int_mode (INTVAL (operands[1]), mode);
-    operands[7] = gen_rtx_AND (mode, operands[5], operands[6]);
-  })
-
 ;; These triggers right at the end of allocation of locals in the
 ;; prologue (and possibly at other places).
 
@@ -1367,46 +460,6 @@
     XEXP (operands[4], 0) = operands[1];
   })
 
-;; Transform
-;;
-;;	mov	src1,reg
-;;	cmp	reg,src2
-;;
-;; into
-;;
-;;	cmp	src1,src2
-;;
-;; if "reg" dies in the comparison.
-
-(define_peephole2
-  [(set (match_operand 0 "register_operand" "")
-	(match_operand 1 "h8300_dst_operand" ""))
-   (set (cc0)
-	(compare (match_dup 0)
-		 (match_operand 2 "h8300_src_operand" "")))]
-  "TARGET_H8300SX
-   && peep2_reg_dead_p (2, operands[0])
-   && !reg_overlap_mentioned_p (operands[0], operands[2])
-   && operands[2] != const0_rtx"
-  [(set (cc0)
-	(compare (match_dup 1)
-		 (match_dup 2)))])
-
-;; Likewise for the second operand.
-
-(define_peephole2
-  [(set (match_operand 0 "register_operand" "")
-	(match_operand 1 "h8300_src_operand" ""))
-   (set (cc0)
-	(compare (match_operand 2 "h8300_dst_operand" "")
-		 (match_dup 0)))]
-  "TARGET_H8300SX
-   && peep2_reg_dead_p (2, operands[0])
-   && !reg_overlap_mentioned_p (operands[0], operands[2])"
-  [(set (cc0)
-	(compare (match_dup 2)
-		 (match_dup 1)))])
-
 ;; Combine two moves.
 
 (define_peephole2
diff --git a/gcc/config/i386/x86-tune-sched.c b/gcc/config/i386/x86-tune-sched.c
index 6d8bca9..2e5ee4e 100644
--- a/gcc/config/i386/x86-tune-sched.c
+++ b/gcc/config/i386/x86-tune-sched.c
@@ -181,7 +181,6 @@ exact_dependency_1 (rtx addr, rtx insn)
     case SYMBOL_REF:
     case CODE_LABEL:
     case PC:
-    case CC0:
     case EXPR_LIST:
       return false;
     default:
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index 40bdcb0..3f63c60 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -1993,8 +1993,6 @@ m68k_output_btst (rtx countop, rtx dataop, rtx_code code, int signpos)
 	     count == 0 followed by bcc/bcs are also possible, but need
 	     m68k-specific CC_Z_IN_NOT_V and CC_Z_IN_NOT_C flags. */
 	}
-
-      cc_status.flags = CC_NOT_NEGATIVE;
     }
   output_asm_insn ("btst %0,%1", ops);
   return code;
diff --git a/gcc/config/rl78/rl78.c b/gcc/config/rl78/rl78.c
index f275cd3..4c34949 100644
--- a/gcc/config/rl78/rl78.c
+++ b/gcc/config/rl78/rl78.c
@@ -3854,7 +3854,6 @@ rl78_note_reg_uses (char *dead, rtx s, rtx insn)
       /* These codes have no constituent expressions
 	 and are unique.  */
     case SCRATCH:
-    case CC0:
     case PC:
       return;
 
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 3b4d416..b6e66dc 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -8809,7 +8809,6 @@ epilogue_renumber (rtx *where, int test)
 	*where = gen_rtx_REG (GET_MODE (*where), OUTGOING_REGNO (REGNO(*where)));
       /* fallthrough */
     case SCRATCH:
-    case CC0:
     case PC:
     case CONST_INT:
     case CONST_WIDE_INT:
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 9a661dd..f4f8f19 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -898,7 +898,7 @@ gen_conditional_move (enum rtx_code code, machine_mode mode,
 	  code = GE;
 	  op1 = const0_rtx;
 	}
-      cmp = gen_rtx_fmt_ee (code, VOIDmode, cc0_rtx, const0_rtx);
+      cmp = gen_rtx_fmt_ee (code, VOIDmode, pc_rtx, const0_rtx);
 
       if (boolean_operator (cmp, VOIDmode))
 	{