c-typeck.c, [...]: Use "built-in" and "bit-field" spellings in messages.

	* c-typeck.c, config/i386/i386.h, config/mcore/mcore.h,
	config/ns32k/ns32k.h, config/rs6000/sysv4.h, fold-const.c,
	toplev.c, cppinit.c, cppmacro.c, gcc.c: Use "built-in" and
	"bit-field" spellings in messages.
	* po/gcc.pot: Regenerate.

ch:
	* expr.c: Use "built-in" spelling in messages.

From-SVN: r48048

4 files changed, 14 insertions, 14 deletions

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index cfbb10b..a95a23e 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -353,25 +353,25 @@ extern int x86_prefetch_sse;
   { "no-accumulate-outgoing-args",MASK_ACCUMULATE_OUTGOING_ARGS_SET,	      \
     N_("Do not use push instructions to save outgoing arguments") },	      \
   { "mmx",			 MASK_MMX | MASK_MMX_SET,		      \
-    N_("Support MMX builtins") },					      \
+    N_("Support MMX built-in functions") },				      \
   { "no-mmx",			 -MASK_MMX,				      \
-    N_("Do not support MMX builtins") },				      \
+    N_("Do not support MMX built-in functions") },			      \
   { "no-mmx",			 MASK_MMX_SET, N_("") },		      \
   { "3dnow",                     MASK_3DNOW | MASK_3DNOW_SET,		      \
-    N_("Support 3DNow! builtins") },					      \
+    N_("Support 3DNow! built-in functions") },				      \
   { "no-3dnow",                  -MASK_3DNOW, N_("") },			      \
   { "no-3dnow",                  MASK_3DNOW_SET,			      \
-    N_("Do not support 3DNow! builtins") },				      \
+    N_("Do not support 3DNow! built-in functions") },			      \
   { "sse",			 MASK_SSE | MASK_SSE_SET,		      \
-    N_("Support MMX and SSE builtins and code generation") },		      \
+    N_("Support MMX and SSE built-in functions and code generation") },	      \
   { "no-sse",			 -MASK_SSE, N_("") },	 		      \
   { "no-sse",			 MASK_SSE_SET,				      \
-    N_("Do not support MMX and SSE builtins and code generation") },	      \
+    N_("Do not support MMX and SSE built-in functions and code generation") },\
   { "sse2",			 MASK_SSE2 | MASK_SSE2_SET,		      \
-    N_("Support MMX, SSE and SSE2 builtins and code generation") },	      \
+    N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
   { "no-sse2",			 -MASK_SSE2, N_("") },			      \
   { "no-sse2",			 MASK_SSE2_SET,				      \
-    N_("Do not support MMX, SSE and SSE2 builtins and code generation") },    \
+    N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \
   { "128bit-long-double",	 MASK_128BIT_LONG_DOUBLE,		      \
     N_("sizeof(long double) is 16") },					      \
   { "96bit-long-double",	-MASK_128BIT_LONG_DOUBLE,		      \
diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h
index 09371c4..7bced8e 100644
--- a/gcc/config/mcore/mcore.h
+++ b/gcc/config/mcore/mcore.h
@@ -139,7 +139,7 @@ extern int target_flags;
   {"no-relax-immediates", - RELAX_IMM_BIT,				\
      N_("Do not arbitary sized immediates in bit operations") },	\
   {"wide-bitfields",        W_FIELD_BIT,				\
-     N_("Always treat bitfield as int-sized") },			\
+     N_("Always treat bit-field as int-sized") },			\
   {"no-wide-bitfields",   - W_FIELD_BIT,				\
      "" },								\
   {"4byte-functions",       OVERALIGN_FUNC_BIT,				\
diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h
index fb2cd4d..f4d52b2 100644
--- a/gcc/config/ns32k/ns32k.h
+++ b/gcc/config/ns32k/ns32k.h
@@ -113,8 +113,8 @@ extern int target_flags;
     { "sb", -32,							\
       N_("Register sb is zero. Use for absolute addressing")},		\
     { "nosb", 32, N_("Do not use register sb")},			\
-    { "bitfield", -64, N_("Do not use bitfield instructions")},		\
-    { "nobitfield", 64, N_("Use bitfield instructions")},		\
+    { "bitfield", -64, N_("Do not use bit-field instructions")},	\
+    { "nobitfield", 64, N_("Use bit-field instructions")},		\
     { "himem", 128, N_("Generate code for high memory")},		\
     { "nohimem", -128, N_("Generate code for low memory")},		\
     { "32381", 256, N_("32381 fpu")},					\
diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index db94589..56e16ba 100644
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -101,9 +101,9 @@ extern int g_switch_set;		/* Whether -G xx was passed.  */
 #undef	SUBTARGET_SWITCHES
 #define SUBTARGET_SWITCHES						\
   { "bit-align",	-MASK_NO_BITFIELD_TYPE,				\
-    N_("Align to the base type of the bitfield") },			\
+    N_("Align to the base type of the bit-field") },			\
   { "no-bit-align",	 MASK_NO_BITFIELD_TYPE,				\
-    N_("Don't align to the base type of the bitfield") },		\
+    N_("Don't align to the base type of the bit-field") },		\
   { "strict-align",	 MASK_STRICT_ALIGN,				\
     N_("Don't assume that unaligned accesses are handled by the system") }, \
   { "no-strict-align",	-MASK_STRICT_ALIGN,				\
@@ -134,7 +134,7 @@ extern int g_switch_set;		/* Whether -G xx was passed.  */
   { "no-eabi",		-MASK_EABI, N_("Don't use EABI") },		\
   { "bit-word",		-MASK_NO_BITFIELD_WORD, "" },			\
   { "no-bit-word",	 MASK_NO_BITFIELD_WORD,				\
-    N_("Do not allow bitfields to cross word boundaries") },		\
+    N_("Do not allow bit-fields to cross word boundaries") },		\
   { "regnames",		  MASK_REGNAMES,				\
     N_("Use alternate register names") },				\
   { "no-regnames",	 -MASK_REGNAMES,				\