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authorBill Schmidt <wschmidt@linux.ibm.com>2012-06-13 12:27:57 +0000
committerWilliam Schmidt <wschmidt@gcc.gnu.org>2012-06-13 12:27:57 +0000
commita21892add39f50fadabff622b086e8b8faa7e93b (patch)
treea90486546faa1a3cb017da25e97444b6cabc379f /gcc/config
parent2be13164c11f39884bc26e941e5c573eacfbe0ac (diff)
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targhooks.c (default_builtin_vectorized_conversion): Handle vec_construct, using vectype to base cost on subparts.
2012-06-13 Bill Schmidt <wschmidt@linux.ibm.com> * targhooks.c (default_builtin_vectorized_conversion): Handle vec_construct, using vectype to base cost on subparts. * target.h (enum vect_cost_for_stmt): Add vec_construct. * tree-vect-stmts.c (vect_model_load_cost): Use vec_construct instead of scalar_to-vec. * config/spu/spu.c (spu_builtin_vectorization_cost): Handle vec_construct in same way as default for now. * config/i386/i386.c (ix86_builtin_vectorization_cost): Likewise. * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Handle vec_construct, including special case for 32-bit loads. From-SVN: r188508
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/i386/i386.c8
-rw-r--r--gcc/config/rs6000/rs6000.c13
-rw-r--r--gcc/config/spu/spu.c8
3 files changed, 27 insertions, 2 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 13755f4..d10bf16 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -36072,9 +36072,11 @@ static const struct attribute_spec ix86_attribute_table[] =
/* Implement targetm.vectorize.builtin_vectorization_cost. */
static int
ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
- tree vectype ATTRIBUTE_UNUSED,
+ tree vectype,
int misalign ATTRIBUTE_UNUSED)
{
+ unsigned elements;
+
switch (type_of_cost)
{
case scalar_stmt:
@@ -36115,6 +36117,10 @@ ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
case vec_promote_demote:
return ix86_cost->vec_stmt_cost;
+ case vec_construct:
+ elements = TYPE_VECTOR_SUBPARTS (vectype);
+ return elements / 2 + 1;
+
default:
gcc_unreachable ();
}
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 11c4bf7..ad9d438 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3405,6 +3405,7 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
tree vectype, int misalign)
{
unsigned elements;
+ tree elem_type;
switch (type_of_cost)
{
@@ -3504,6 +3505,18 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
return 2;
+ case vec_construct:
+ elements = TYPE_VECTOR_SUBPARTS (vectype);
+ elem_type = TREE_TYPE (vectype);
+ /* 32-bit vectors loaded into registers are stored as double
+ precision, so we need n/2 converts in addition to the usual
+ n/2 merges to construct a vector of short floats from them. */
+ if (SCALAR_FLOAT_TYPE_P (elem_type)
+ && TYPE_PRECISION (elem_type) == 32)
+ return elements + 1;
+ else
+ return elements / 2 + 1;
+
default:
gcc_unreachable ();
}
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index b81bf5e..5310ba7 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -6908,9 +6908,11 @@ spu_builtin_mask_for_load (void)
/* Implement targetm.vectorize.builtin_vectorization_cost. */
static int
spu_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
- tree vectype ATTRIBUTE_UNUSED,
+ tree vectype,
int misalign ATTRIBUTE_UNUSED)
{
+ unsigned elements;
+
switch (type_of_cost)
{
case scalar_stmt:
@@ -6937,6 +6939,10 @@ spu_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
case cond_branch_taken:
return 6;
+ case vec_construct:
+ elements = TYPE_VECTOR_SUBPARTS (vectype);
+ return elements / 2 + 1;
+
default:
gcc_unreachable ();
}