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| author | Kirill Yukhin <kirill.yukhin@intel.com> | 2011-10-20 20:37:32 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2011-10-20 13:37:32 -0700 |
| commit | 6dd3234ecf66a168d45c5e31398232191c76ddf8 (patch) | |
| tree | ae3171dc2b2dcc57fce98ff4077b5093c9966749 /gcc/config | |
| parent | 5a3c00681c5eb8b14a08438c5b0a18a04aab0c2b (diff) | |
| download | gcc-6dd3234ecf66a168d45c5e31398232191c76ddf8.zip gcc-6dd3234ecf66a168d45c5e31398232191c76ddf8.tar.gz gcc-6dd3234ecf66a168d45c5e31398232191c76ddf8.tar.bz2 | |
Fix operands order in BMI2 patterns.
gcc/
2011-10-20 Kirill Yukhin <kirill.yukhin@intel.com>
PR target/50766
* config/i386/i386.md (bmi_bextr_<mode>): Update register/
memory operand order.
(bmi2_bzhi_<mode>3): Ditto.
(bmi2_pdep_<mode>3): Ditto.
(bmi2_pext_<mode>3): Ditto.
gcc/testsuite/
2011-10-20 Kirill Yukhin <kirill.yukhin@intel.com>
PR target/50766
* gcc.target/i386/pr50766.c: New test.
From-SVN: r180271
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/i386.md | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 9c9508d..866fb05 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12099,8 +12099,8 @@ (define_insn "bmi_bextr_<mode>" [(set (match_operand:SWI48 0 "register_operand" "=r") - (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm") - (match_operand:SWI48 2 "register_operand" "r")] + (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r") + (match_operand:SWI48 2 "nonimmediate_operand" "rm")] UNSPEC_BEXTR)) (clobber (reg:CC FLAGS_REG))] "TARGET_BMI" @@ -12149,9 +12149,9 @@ ;; BMI2 instructions. (define_insn "bmi2_bzhi_<mode>3" [(set (match_operand:SWI48 0 "register_operand" "=r") - (and:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "rm") + (and:SWI48 (match_operand:SWI48 1 "register_operand" "r") (lshiftrt:SWI48 (const_int -1) - (match_operand:SWI48 2 "register_operand" "r")))) + (match_operand:SWI48 2 "nonimmediate_operand" "rm")))) (clobber (reg:CC FLAGS_REG))] "TARGET_BMI2" "bzhi\t{%2, %1, %0|%0, %1, %2}" @@ -12161,8 +12161,8 @@ (define_insn "bmi2_pdep_<mode>3" [(set (match_operand:SWI48 0 "register_operand" "=r") - (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm") - (match_operand:SWI48 2 "register_operand" "r")] + (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r") + (match_operand:SWI48 2 "nonimmediate_operand" "rm")] UNSPEC_PDEP))] "TARGET_BMI2" "pdep\t{%2, %1, %0|%0, %1, %2}" @@ -12172,8 +12172,8 @@ (define_insn "bmi2_pext_<mode>3" [(set (match_operand:SWI48 0 "register_operand" "=r") - (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "rm") - (match_operand:SWI48 2 "register_operand" "r")] + (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r") + (match_operand:SWI48 2 "nonimmediate_operand" "rm")] UNSPEC_PEXT))] "TARGET_BMI2" "pext\t{%2, %1, %0|%0, %1, %2}" |