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| author | Andreas Krebbel <krebbel@linux.ibm.com> | 2019-04-02 11:06:30 +0000 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@gcc.gnu.org> | 2019-04-02 11:06:30 +0000 |
| commit | 6913111a953ed51a4ad232a53abecb08ed42c703 (patch) | |
| tree | c40cbc2fc10d23881b371fbf6224938bf8359893 /gcc/config | |
| parent | b5e100c5e32c2b5cf034eeabff9d70b3d5d230cb (diff) | |
| download | gcc-6913111a953ed51a4ad232a53abecb08ed42c703.zip gcc-6913111a953ed51a4ad232a53abecb08ed42c703.tar.gz gcc-6913111a953ed51a4ad232a53abecb08ed42c703.tar.bz2 | |
S/390: arch13: vector load byte reversed element and replicate
gcc/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
("*vec_splats_bswap_vec<mode>", "*vec_splats_bswap_elem<mode>"):
New insn definition.
* config/s390/vx-builtins.md (V_HW_HSD): Move to ...
* config/s390/vector.md (V_HW_HSD): ... here.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/zvector/replicate-bswap-1.c: New test.
* gcc.target/s390/zvector/replicate-bswap-2.c: New test.
From-SVN: r270088
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/s390/vector.md | 20 | ||||
| -rw-r--r-- | gcc/config/s390/vx-builtins.md | 1 |
2 files changed, 20 insertions, 1 deletions
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index f25c866..8f02af4 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -34,6 +34,7 @@ (define_mode_iterator V_HW_64 [V2DI V2DF]) (define_mode_iterator VT_HW_HSDT [V8HI V4SI V4SF V2DI V2DF V1TI V1TF TI TF]) +(define_mode_iterator V_HW_HSD [V8HI V4SI (V4SF "TARGET_VXE") V2DI V2DF]) ; Including TI for instructions that support it (va, vn, ...) (define_mode_iterator VT_HW [V16QI V8HI V4SI V2DI V2DF V1TI TI (V4SF "TARGET_VXE") (V1TF "TARGET_VXE")]) @@ -548,6 +549,25 @@ #" [(set_attr "op_type" "VRX,VRI,VRI,*")]) +; vlbrreph, vlbrrepf, vlbrrepg +(define_insn "*vec_splats_bswap_vec<mode>" + [(set (match_operand:V_HW_HSD 0 "register_operand" "=v") + (bswap:V_HW_HSD + (vec_duplicate:V_HW_HSD (match_operand:<non_vec> 1 "memory_operand" "R"))))] + "TARGET_VXE2" + "vlbrrep<bhfgq>\t%v0,%1" + [(set_attr "op_type" "VRX")]) + +; Why do we need both? Shouldn't there be a canonical form? +; vlbrreph, vlbrrepf, vlbrrepg +(define_insn "*vec_splats_bswap_elem<mode>" + [(set (match_operand:V_HW_HSD 0 "register_operand" "=v") + (vec_duplicate:V_HW_HSD + (bswap:<non_vec> (match_operand:<non_vec> 1 "memory_operand" "R"))))] + "TARGET_VXE2" + "vlbrrep<bhfgq>\t%v0,%1" + [(set_attr "op_type" "VRX")]) + ; A TFmode operand resides in FPR register pairs while V1TF is in a ; single vector register. (define_insn "*vec_tf_to_v1tf" diff --git a/gcc/config/s390/vx-builtins.md b/gcc/config/s390/vx-builtins.md index 8d837c4..1595ffb 100644 --- a/gcc/config/s390/vx-builtins.md +++ b/gcc/config/s390/vx-builtins.md @@ -22,7 +22,6 @@ (define_mode_iterator V_HW_32_64 [V4SI V2DI V2DF (V4SF "TARGET_VXE")]) (define_mode_iterator VI_HW_SD [V4SI V2DI]) -(define_mode_iterator V_HW_HSD [V8HI V4SI (V4SF "TARGET_VXE") V2DI V2DF]) (define_mode_iterator V_HW_4 [V4SI V4SF]) ; Full size vector modes with more than one element which are directly supported in vector registers by the hardware. (define_mode_iterator VEC_HW [V16QI V8HI V4SI V2DI V2DF (V4SF "TARGET_VXE")]) |