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| author | Paolo Bonzini <bonzini@gcc.gnu.org> | 2004-07-23 10:15:53 +0000 |
|---|---|---|
| committer | Paolo Bonzini <bonzini@gcc.gnu.org> | 2004-07-23 10:15:53 +0000 |
| commit | 49e76be8974253f3cc2e16e43b0aa437fba0cd83 (patch) | |
| tree | 846cea2f0ced690bb5eb61e3a384ad1678041c6c /gcc/config | |
| parent | 8f2a734fc8d6d5ae168a2279462dcdc573f5ea71 (diff) | |
| download | gcc-49e76be8974253f3cc2e16e43b0aa437fba0cd83.zip gcc-49e76be8974253f3cc2e16e43b0aa437fba0cd83.tar.gz gcc-49e76be8974253f3cc2e16e43b0aa437fba0cd83.tar.bz2 | |
machmode.def: Remove vector modes.
2004-07-22 Paolo Bonzini <bonzini@gnu.org>
* machmode.def: Remove vector modes.
* config/alpha/alpha-modes.def: Add supported vector modes.
* config/arm/arm-modes.def: Likewise.
* config/frv/frv-modes.def: Likewise.
* config/i386/i386-modes.def: Likewise.
* config/rs6000/rs6000-modes.def: Likewise.
* config/sh/sh-modes.def: Likewise.
From-SVN: r85076
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/alpha/alpha-modes.def | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm-modes.def | 8 | ||||
| -rw-r--r-- | gcc/config/frv/frv-modes.def | 3 | ||||
| -rw-r--r-- | gcc/config/i386/i386-modes.def | 12 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000-modes.def | 7 | ||||
| -rw-r--r-- | gcc/config/sh/sh-modes.def | 10 |
6 files changed, 45 insertions, 0 deletions
diff --git a/gcc/config/alpha/alpha-modes.def b/gcc/config/alpha/alpha-modes.def index 8e9e698..0a0d1c5 100644 --- a/gcc/config/alpha/alpha-modes.def +++ b/gcc/config/alpha/alpha-modes.def @@ -21,3 +21,8 @@ Boston, MA 02111-1307, USA. */ /* 128-bit floating point. This gets reset in alpha_override_options if VAX float format is in use. */ FLOAT_MODE (TF, 16, ieee_quad_format); + +/* Vector modes. */ +VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */ +VECTOR_MODE (INT, QI, 4); /* V4QI */ +VECTOR_MODE (INT, QI, 2); /* V2QI */ diff --git a/gcc/config/arm/arm-modes.def b/gcc/config/arm/arm-modes.def index b853551..c974272 100644 --- a/gcc/config/arm/arm-modes.def +++ b/gcc/config/arm/arm-modes.def @@ -50,3 +50,11 @@ CC_MODE (CC_DGEU); CC_MODE (CC_DGTU); CC_MODE (CC_C); CC_MODE (CC_N); + +/* Vector modes. */ +VECTOR_MODES (INT, 4); /* V4QI V2HI */ +VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */ +VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */ +VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */ +VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */ + diff --git a/gcc/config/frv/frv-modes.def b/gcc/config/frv/frv-modes.def index 3985099..7d3b0ef 100644 --- a/gcc/config/frv/frv-modes.def +++ b/gcc/config/frv/frv-modes.def @@ -28,3 +28,6 @@ Boston, MA 02111-1307, USA. */ CC_MODE (CC_UNS); CC_MODE (CC_FP); CC_MODE (CC_CCR); + +VECTOR_MODE (INT, QI, 4); /* V4QI */ +VECTOR_MODE (INT, SI, 4); /* V4SI */ diff --git a/gcc/config/i386/i386-modes.def b/gcc/config/i386/i386-modes.def index 89c83c4..3a7c3e6 100644 --- a/gcc/config/i386/i386-modes.def +++ b/gcc/config/i386/i386-modes.def @@ -60,3 +60,15 @@ CC_MODE (CCNO); CC_MODE (CCZ); CC_MODE (CCFP); CC_MODE (CCFPU); + +/* Vector modes. */ +VECTOR_MODES (INT, 4); /* V4QI V2HI */ +VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */ +VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */ +VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */ +VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */ +VECTOR_MODE (INT, DI, 4); /* V4DI */ +VECTOR_MODE (INT, SI, 8); /* V8SI */ + +/* The symbol Pmode stands for one of the above machine modes (usually SImode). + The tm.h file specifies which one. It is not a distinct mode. */ diff --git a/gcc/config/rs6000/rs6000-modes.def b/gcc/config/rs6000/rs6000-modes.def index 6f17f1a..97f086b 100644 --- a/gcc/config/rs6000/rs6000-modes.def +++ b/gcc/config/rs6000/rs6000-modes.def @@ -38,3 +38,10 @@ PARTIAL_INT_MODE (SI); CC_MODE (CCUNS); CC_MODE (CCFP); CC_MODE (CCEQ); + +/* Vector modes. */ +VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */ +VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */ +VECTOR_MODE (INT, DI, 1); +VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */ +VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */ diff --git a/gcc/config/sh/sh-modes.def b/gcc/config/sh/sh-modes.def index 3906b43..1b97176 100644 --- a/gcc/config/sh/sh-modes.def +++ b/gcc/config/sh/sh-modes.def @@ -21,3 +21,13 @@ Boston, MA 02111-1307, USA. */ /* The SH uses a partial integer mode to represent the FPSCR register. */ PARTIAL_INT_MODE (SI); +/* Vector modes. */ +VECTOR_MODE (INT, QI, 2); /* V2QI */ +VECTOR_MODES (INT, 4); /* V4QI V2HI */ +VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */ +VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */ +VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */ +VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */ +VECTOR_MODE (INT, DI, 4); /* V4DI */ +VECTOR_MODE (INT, DI, 8); /* V8DI */ +VECTOR_MODE (FLOAT, SF, 16); /* V16SF */ |