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authorKazu Hirata <kazu@gcc.gnu.org>2002-09-28 15:29:45 +0000
committerKazu Hirata <kazu@gcc.gnu.org>2002-09-28 15:29:45 +0000
commit43aa4e05ea72d300ede141b3222e54f77c6ea4a7 (patch)
treed6229d36c3ba1bde96e6ff5cf2b04b6fb1b8d777 /gcc/config
parent13e8651c8a52719e6e5a8b4b1a6552bffd7bcd79 (diff)
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ChangeLog.4: Fix typos.
* ChangeLog.4: Fix typos. * ChangeLog.6: Likewise. * FSFChangeLog.10: Likewise. * genattrtab.c: Fix comment typos. * haifa-sched.c: Likewise. * real.c: Likewise. * tree.h: Likewise. * config/arm/arm.c: Likewise. * config/arm/crti.asm: Likewise. * config/arm/crtn.asm: Likewise. * config/frv/frv.c: Likewise. * config/frv/frv.md: Likewise. * config/h8300/h8300.md: Likewise. * config/i386/rtemself.h: Likewise. * config/ia64/unwind-ia64.c: Likewise. * config/ip2k/ip2k.h: Likewise. * config/m88k/m88k.c: Likewise. * config/m88k/m88k.md: Likewise. * config/mips/sr71k.md: Likewise. * config/mmix/mmix.c: Likewise. * config/rs6000/rs6000.c: Likewise. * config/sh/sh.md: Likewise. From-SVN: r57614
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/arm/arm.c2
-rw-r--r--gcc/config/arm/crti.asm2
-rw-r--r--gcc/config/arm/crtn.asm2
-rw-r--r--gcc/config/frv/frv.c6
-rw-r--r--gcc/config/frv/frv.md2
-rw-r--r--gcc/config/h8300/h8300.md2
-rw-r--r--gcc/config/i386/rtemself.h2
-rw-r--r--gcc/config/ia64/unwind-ia64.c2
-rw-r--r--gcc/config/ip2k/ip2k.h2
-rw-r--r--gcc/config/m88k/m88k.c2
-rw-r--r--gcc/config/m88k/m88k.md12
-rw-r--r--gcc/config/mips/sr71k.md2
-rw-r--r--gcc/config/mmix/mmix.c2
-rw-r--r--gcc/config/rs6000/rs6000.c2
-rw-r--r--gcc/config/sh/sh.md2
15 files changed, 22 insertions, 22 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 5eb1fc0..23b9043 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -8055,7 +8055,7 @@ emit_sfm (base_reg, count)
current stack pointer -> | | /
--
- For a given function some or all of these stack compomnents
+ For a given function some or all of these stack components
may not be needed, giving rise to the possibility of
eliminating some of the registers.
diff --git a/gcc/config/arm/crti.asm b/gcc/config/arm/crti.asm
index f3741db..ac58e44 100644
--- a/gcc/config/arm/crti.asm
+++ b/gcc/config/arm/crti.asm
@@ -35,7 +35,7 @@
# .init sections. Users may put any desired instructions in those
# sections.
- # Note - this macro is complimented by the FUNC_END macro
+ # Note - this macro is complemented by the FUNC_END macro
# in crtn.asm. If you change this macro you must also change
# that macro match.
.macro FUNC_START
diff --git a/gcc/config/arm/crtn.asm b/gcc/config/arm/crtn.asm
index a7f0e9e..2f4b542 100644
--- a/gcc/config/arm/crtn.asm
+++ b/gcc/config/arm/crtn.asm
@@ -35,7 +35,7 @@
# fact return. Users may put any desired instructions in those sections.
# This file is the last thing linked into any executable.
- # Note - this macro is complimented by the FUNC_START macro
+ # Note - this macro is complemented by the FUNC_START macro
# in crti.asm. If you change this macro you must also change
# that macro match.
#
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index cea0b57..a49b157 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -1753,7 +1753,7 @@ frv_function_epilogue (file, size)
/* Called after register allocation to add any instructions needed for the
- epilogue. Using a epilogue insn is favored compared to putting all of the
+ epilogue. Using an epilogue insn is favored compared to putting all of the
instructions in the FUNCTION_PROLOGUE macro, since it allows the scheduler
to intermix instructions with the saves of the caller saved registers. In
some cases, it might be necessary to emit a barrier instruction as the last
@@ -2701,7 +2701,7 @@ frv_print_operand_jump_hint (insn)
}
-/* Print an operand to a assembler instruction.
+/* Print an operand to an assembler instruction.
`%' followed by a letter and a digit says to output an operand in an
alternate fashion. Four letters have standard, built-in meanings described
@@ -7672,7 +7672,7 @@ frv_initialize_trampoline (addr, fnaddr, static_chain)
registers can only be copied to memory and not to another class of
registers. In that case, secondary reload registers are not needed and
would not be helpful. Instead, a stack location must be used to perform the
- copy and the `movM' pattern should use memory as a intermediate storage.
+ copy and the `movM' pattern should use memory as an intermediate storage.
This case often occurs between floating-point and general registers. */
enum reg_class
diff --git a/gcc/config/frv/frv.md b/gcc/config/frv/frv.md
index ac078ba..a5e82ee 100644
--- a/gcc/config/frv/frv.md
+++ b/gcc/config/frv/frv.md
@@ -5524,7 +5524,7 @@
}")
;; Called after register allocation to add any instructions needed for the
-;; epilogue. Using a epilogue insn is favored compared to putting all of the
+;; epilogue. Using an epilogue insn is favored compared to putting all of the
;; instructions in the FUNCTION_EPILOGUE macro, since it allows the scheduler
;; to intermix instructions with the restires of the caller saved registers.
;; In some cases, it might be necessary to emit a barrier instruction as the
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 5ac93fc..ab2573a 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -35,7 +35,7 @@
;; more 16bit registers). At that point addhi and subhi can't use
;; adds/subs.
-;; There's currently no way to have a insv/extzv expander for the H8/300H
+;; There's currently no way to have an insv/extzv expander for the H8/300H
;; because word_mode is different for the H8/300 and H8/300H.
;; Shifts/rotates by small constants should be handled by special
diff --git a/gcc/config/i386/rtemself.h b/gcc/config/i386/rtemself.h
index dcf2808..0967178 100644
--- a/gcc/config/i386/rtemself.h
+++ b/gcc/config/i386/rtemself.h
@@ -1,4 +1,4 @@
-/* Definitions for rtems targeting a ix86 using ELF.
+/* Definitions for rtems targeting an ix86 using ELF.
Copyright (C) 1996, 1997, 2000, 2001, 2002 Free Software Foundation, Inc.
Contributed by Joel Sherrill (joel@OARcorp.com).
diff --git a/gcc/config/ia64/unwind-ia64.c b/gcc/config/ia64/unwind-ia64.c
index daf02a2..e55f1f8 100644
--- a/gcc/config/ia64/unwind-ia64.c
+++ b/gcc/config/ia64/unwind-ia64.c
@@ -143,7 +143,7 @@ typedef struct unw_state_record
unsigned int any_spills : 1; /* got any register spills? */
unsigned int in_body : 1; /* are we inside a body? */
unsigned int no_reg_stack_frame : 1; /* Don't adjust bsp for i&l regs */
- unsigned char *imask; /* imask of of spill_mask record or NULL */
+ unsigned char *imask; /* imask of spill_mask record or NULL */
unsigned long pr_val; /* predicate values */
unsigned long pr_mask; /* predicate mask */
long spill_offset; /* psp-relative offset for spill base */
diff --git a/gcc/config/ip2k/ip2k.h b/gcc/config/ip2k/ip2k.h
index e05b02c..00be9c4 100644
--- a/gcc/config/ip2k/ip2k.h
+++ b/gcc/config/ip2k/ip2k.h
@@ -851,7 +851,7 @@ enum reg_class {
class of registers. In that case, secondary reload registers are
not needed and would not be helpful. Instead, a stack location
must be used to perform the copy and the `movM' pattern should use
- memory as a intermediate storage. This case often occurs between
+ memory as an intermediate storage. This case often occurs between
floating-point and general registers. */
/* `SECONDARY_MEMORY_NEEDED (CLASS1, CLASS2, M)'
diff --git a/gcc/config/m88k/m88k.c b/gcc/config/m88k/m88k.c
index a6eae5e..fde0d14 100644
--- a/gcc/config/m88k/m88k.c
+++ b/gcc/config/m88k/m88k.c
@@ -2921,7 +2921,7 @@ print_operand (file, x, code)
fprintf (file, "%d", value);
return;
- case 'S': /* compliment the value and then... */
+ case 'S': /* complement the value and then... */
value = ~value;
case 's': /* print the width and offset values forming the integer
constant with a SET instruction. See integer_ok_for_set. */
diff --git a/gcc/config/m88k/m88k.md b/gcc/config/m88k/m88k.md
index 24a66f8..edefd23 100644
--- a/gcc/config/m88k/m88k.md
+++ b/gcc/config/m88k/m88k.md
@@ -398,10 +398,10 @@
;;
;; When the extracted conditions are the same, the define_split patterns
;; below change extu/extu/{and,or} into {and,or}/extu. If the reversed
-;; conditions match, one compare word can be complimented, resulting in
+;; conditions match, one compare word can be complemented, resulting in
;; {and.c,or.c}/extu. These changes are done for ext/ext/{and,or} as well.
;; If the conditions don't line up, one can be rotated. To keep the pairwise
-;; relationship, it may be necessary to both rotate and compliment. Rotating
+;; relationship, it may be necessary to both rotate and complement. Rotating
;; makes branching cheaper, but doesn't help (or hurt) creating a value, so
;; we don't do this for ext/ext/{and,or}.
;;
@@ -430,7 +430,7 @@
; /* The conditions match. */
else if (GET_CODE (operands[1])
== reverse_condition (GET_CODE (operands[3])))
- /* Reverse the condition by complimenting the compare word. */
+ /* Reverse the condition by complementing the compare word. */
operands[4] = gen_rtx_NOT (CCmode, operands[4]);
else
{
@@ -525,7 +525,7 @@
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
- /* Reverse the condition by complimenting the compare word. */
+ /* Reverse the condition by complementing the compare word. */
if (GET_CODE (operands[1]) != GET_CODE (operands[3]))
operands[4] = gen_rtx_NOT (CCmode, operands[4]);")
@@ -585,7 +585,7 @@
; /* The conditions match. */
else if (GET_CODE (operands[1])
== reverse_condition (GET_CODE (operands[3])))
- /* Reverse the condition by complimenting the compare word. */
+ /* Reverse the condition by complementing the compare word. */
operands[4] = gen_rtx_NOT (CCmode, operands[4]);
else
{
@@ -677,7 +677,7 @@
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
- /* Reverse the condition by complimenting the compare word. */
+ /* Reverse the condition by complementing the compare word. */
if (GET_CODE (operands[1]) != GET_CODE (operands[3]))
operands[4] = gen_rtx_NOT (CCmode, operands[4]);")
diff --git a/gcc/config/mips/sr71k.md b/gcc/config/mips/sr71k.md
index faeeebc..82162e3 100644
--- a/gcc/config/mips/sr71k.md
+++ b/gcc/config/mips/sr71k.md
@@ -4,7 +4,7 @@
;;
;; The SR3 is describeds as:
;; - nine-stage pipeline, insn buffering with out-of-order issue to
-;; multiple function units, with a average dispatch rate of 2
+;; multiple function units, with an average dispatch rate of 2
;; insn.s per cycle (max 6 insns: 2 fpu, 4 cpu).
;;
;; The details on this are scant except for a diagram in
diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c
index 61af93a..be1d25e 100644
--- a/gcc/config/mmix/mmix.c
+++ b/gcc/config/mmix/mmix.c
@@ -693,7 +693,7 @@ mmix_asm_preferred_eh_data_format (code, global)
return DW_EH_PE_absptr;
}
-/* Make a note that we've seen the beginning of of the prologue. This
+/* Make a note that we've seen the beginning of the prologue. This
matters to whether we'll translate register numbers as calculated by
mmix_machine_dependent_reorg. */
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 171e557..666c6af 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -7389,7 +7389,7 @@ print_operand (file, x, code)
case 'G':
/* X is a constant integer. If it is negative, print "m",
- otherwise print "z". This is to make a aze or ame insn. */
+ otherwise print "z". This is to make an aze or ame insn. */
if (GET_CODE (x) != CONST_INT)
output_operand_lossage ("invalid %%G value");
else if (INTVAL (x) >= 0)
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index f0408ef..b237664 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -1955,7 +1955,7 @@
"and %2,%0"
[(set_attr "type" "arith")])
-;; If the constant is 255, then emit a extu.b instruction instead of an
+;; If the constant is 255, then emit an extu.b instruction instead of an
;; and, since that will give better code.
(define_expand "andsi3"