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| author | Uros Bizjak <ubizjak@gmail.com> | 2023-12-29 09:47:43 +0100 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2023-12-29 09:53:01 +0100 |
| commit | 1e7f9abb892443719c82bb17910caa8fb5eeec15 (patch) | |
| tree | c86b2baf022cef8783c23e9d1ce291dd6ad6e5cd /gcc/config | |
| parent | 200531d5b9fb99eca2b0d6b8d1e42d176413225f (diff) | |
| download | gcc-1e7f9abb892443719c82bb17910caa8fb5eeec15.zip gcc-1e7f9abb892443719c82bb17910caa8fb5eeec15.tar.gz gcc-1e7f9abb892443719c82bb17910caa8fb5eeec15.tar.bz2 | |
i386: Fix TARGET_USE_VECTOR_FP_CONVERTS SF->DF float_extend splitter [PR113133]
The post-reload splitter currently allows xmm16+ registers with TARGET_EVEX512.
The splitter changes SFmode of the output operand to V4SFmode, but the vector
mode is currently unsupported in xmm16+ without TARGET_AVX512VL. lowpart_subreg
returns NULL_RTX in this case and the compilation fails with invalid RTX.
The patch removes support for x/ymm16+ registers with TARGET_EVEX512. The
support should be restored once ix86_hard_regno_mode_ok is fixed to allow
16-byte modes in x/ymm16+ with TARGET_EVEX512.
PR target/113133
gcc/ChangeLog:
* config/i386/i386.md
(TARGET_USE_VECTOR_FP_CONVERTS SF->DF float_extend splitter):
Do not handle xmm16+ with TARGET_EVEX512.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr113133-1.c: New test.
* gcc.target/i386/pr113133-2.c: New test.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/i386.md | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index ca6dbf4..e693d93 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5210,7 +5210,7 @@ && optimize_insn_for_speed_p () && reload_completed && (!EXT_REX_SSE_REG_P (operands[0]) - || TARGET_AVX512VL || TARGET_EVEX512)" + || TARGET_AVX512VL)" [(set (match_dup 2) (float_extend:V2DF (vec_select:V2SF @@ -5226,8 +5226,7 @@ /* If it is unsafe to overwrite upper half of source, we need to move to destination and unpack there. */ if (REGNO (operands[0]) != REGNO (operands[1]) - || (EXT_REX_SSE_REG_P (operands[1]) - && !TARGET_AVX512VL)) + || (EXT_REX_SSE_REG_P (operands[1]) && !TARGET_AVX512VL)) { rtx tmp = lowpart_subreg (SFmode, operands[0], DFmode); emit_move_insn (tmp, operands[1]); |