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authorStephane Carrez <Stephane.Carrez@sun.com>2001-12-07 21:47:53 +0000
committerStephane Carrez <ciceron@gcc.gnu.org>2001-12-07 22:47:53 +0100
commit09ebda1bc45f8bd87d687cb9983e0d950b9f85c6 (patch)
tree3f5e1439af92960fbddad0cc509d9fea26d40f46 /gcc/config
parent595b6314cfd5cd08cabdcb3949bf7db369fa5d19 (diff)
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sparc.c (epilogue_renumber): Do not replace %fp with %sp because it can cause the delayed instruction to...
* config/sparc/sparc.c (epilogue_renumber): Do not replace %fp with %sp because it can cause the delayed instruction to load below the stack. From-SVN: r47772
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/sparc/sparc.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index ec3aa0e..dec8b8c 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -5427,6 +5427,30 @@ epilogue_renumber (where, test)
case CONST_DOUBLE:
return 0;
+ /* Do not replace the frame pointer with the stack pointer because
+ it can cause the delayed instruction to load below the stack.
+ This occurs when instructions like:
+
+ (set (reg/i:SI 24 %i0)
+ (mem/f:SI (plus:SI (reg/f:SI 30 %fp)
+ (const_int -20 [0xffffffec])) 0))
+
+ are in the return delayed slot. */
+ case PLUS:
+ if (GET_CODE (XEXP (*where, 0)) == REG
+ && REGNO (XEXP (*where, 0)) == FRAME_POINTER_REGNUM
+ && (GET_CODE (XEXP (*where, 1)) != CONST_INT
+ || INTVAL (XEXP (*where, 1)) < SPARC_STACK_BIAS))
+ return 1;
+ break;
+
+ case MEM:
+ if (SPARC_STACK_BIAS
+ && GET_CODE (XEXP (*where, 0)) == REG
+ && REGNO (XEXP (*where, 0)) == FRAME_POINTER_REGNUM)
+ return 1;
+ break;
+
default:
break;
}