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authorDavid S. Miller <davem@davemloft.net>2011-10-31 22:09:12 +0000
committerDavid S. Miller <davem@gcc.gnu.org>2011-10-31 15:09:12 -0700
commit015e8b63f414805a0dc670d43c15a6a352b74079 (patch)
tree20743cedf11c57f39d75ea4d895b57a83ff5de3f /gcc/config
parent7e547d7b317e52d0fbf4270aadcf47862d5faf73 (diff)
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Allow zero operand in sparc VIS3 cmask patterns.
* config/sparc/sparc.md (cmask patterns): Allow zero operand. From-SVN: r180715
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/sparc/sparc.md6
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 6dd3909..fbd1a87 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -8452,7 +8452,7 @@
;; Conditional moves are possible via fcmpX --> cmaskX -> bshuffle
(define_insn "cmask8<P:mode>_vis"
[(set (reg:DI GSR_REG)
- (unspec:DI [(match_operand:P 0 "register_operand" "r")
+ (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ")
(reg:DI GSR_REG)]
UNSPEC_CMASK8))]
"TARGET_VIS3"
@@ -8460,7 +8460,7 @@
(define_insn "cmask16<P:mode>_vis"
[(set (reg:DI GSR_REG)
- (unspec:DI [(match_operand:P 0 "register_operand" "r")
+ (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ")
(reg:DI GSR_REG)]
UNSPEC_CMASK16))]
"TARGET_VIS3"
@@ -8468,7 +8468,7 @@
(define_insn "cmask32<P:mode>_vis"
[(set (reg:DI GSR_REG)
- (unspec:DI [(match_operand:P 0 "register_operand" "r")
+ (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ")
(reg:DI GSR_REG)]
UNSPEC_CMASK32))]
"TARGET_VIS3"