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| author | Naveen.H.S <naveen.hs@kpitcummins.com> | 2008-03-25 13:41:23 +0000 |
|---|---|---|
| committer | Kaz Kojima <kkojima@gcc.gnu.org> | 2008-03-25 13:41:23 +0000 |
| commit | f326a6cbc00ba13125882eb13d257660f2618d56 (patch) | |
| tree | 611a36da838d794beb466fa7805b1c7e331eaed3 /gcc/config | |
| parent | b4b0018b305101e1f5b4951169e1d5649747367e (diff) | |
| download | gcc-f326a6cbc00ba13125882eb13d257660f2618d56.zip gcc-f326a6cbc00ba13125882eb13d257660f2618d56.tar.gz gcc-f326a6cbc00ba13125882eb13d257660f2618d56.tar.bz2 | |
sh.c (sh_expand_t_scc): Emit movrt for SH2A if possible.
* config/sh/sh.c (sh_expand_t_scc): Emit movrt for SH2A if
possible.
* config/sh/sh.md (xorsi3_movrt, movrt): New insns.
* gcc.target/sh/sh2a-movrt.c: New test.
From-SVN: r133517
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/sh/sh.c | 3 | ||||
| -rw-r--r-- | gcc/config/sh/sh.md | 19 |
2 files changed, 22 insertions, 0 deletions
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index df959d8..699ac89 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -10605,6 +10605,9 @@ sh_expand_t_scc (enum rtx_code code, rtx target) val = INTVAL (sh_compare_op1); if ((code == EQ && val == 1) || (code == NE && val == 0)) emit_insn (gen_movt (result)); + else if (TARGET_SH2A && ((code == EQ && val == 0) + || (code == NE && val == 1))) + emit_insn (gen_movrt (result)); else if ((code == EQ && val == 0) || (code == NE && val == 1)) { emit_insn (gen_rtx_CLOBBER (VOIDmode, result)); diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 0073370..61e9025 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -3326,6 +3326,15 @@ label: xori %1, %2, %0" [(set_attr "type" "arith_media")]) +;; Store the complements of the T bit in a register. +(define_insn "xorsi3_movrt" + [(set (match_operand:SI 0 "arith_reg_dest" "=r") + (xor:SI (reg:SI T_REG) + (const_int 1)))] + "TARGET_SH2A" + "movrt\\t%0" + [(set_attr "type" "arith")]) + (define_insn "xordi3" [(set (match_operand:DI 0 "arith_reg_dest" "=r,r") (xor:DI (match_operand:DI 1 "arith_reg_operand" "%r,r") @@ -9545,6 +9554,16 @@ mov.l\\t1f,r0\\n\\ "movt %0" [(set_attr "type" "arith")]) +;; complements the T bit and stores the result in a register +(define_insn "movrt" + [(set (match_operand:SI 0 "arith_reg_dest" "=r") + (if_then_else (eq:SI (reg:SI T_REG) (const_int 0)) + (const_int 1) + (const_int 0)))] + "TARGET_SH2A" + "movrt\\t%0" + [(set_attr "type" "arith")]) + (define_expand "seq" [(set (match_operand:SI 0 "arith_reg_dest" "") (match_dup 1))] |