Fix up duplicated duplicated words mostly in comments

In the r10-7197-gbae7b38cf8a21e068ad5c0bab089dedb78af3346 commit I've
noticed duplicated word in a message, which lead me to grep for those and
we have a tons of them.
I've used
grep -v 'long long\|optab optab\|template template\|double double' *.[chS] */*.[chS] *.def config/*/* 2>/dev/null | grep ' \([a-zA-Z]\+\) \1 '
Note, the command will not detect the doubled words at the start or end of
line or when one of the words is at the end of line and the next one at the
start of another one.
Some of it is fairly obvious, e.g. all the "the the" cases which is
something I've posted and committed patch for already e.g. in 2016,
other cases are often valid, e.g. "that that" seems to look mostly ok to me.
Some cases are quite hard to figure out, I've left out some of them from the
patch (e.g. "and and" in some cases isn't talking about bitwise/logical and
and so looks incorrect, but in other cases it is talking about those
operations).
In most cases the right solution seems to be to remove one of the duplicated
words, but not always.

I think most important are the ones with user visible messages (in the patch
3 of the first 4 hunks), the rest is just comments (and internal
documentation; for that see the doc/tm.texi changes).

2020-03-17  Jakub Jelinek  <jakub@redhat.com>

	* lra-spills.c (remove_pseudos): Fix up duplicated word issue in
	a dump message.
	* tree-sra.c (create_access_replacement): Fix up duplicated word issue
	in a comment.
	* read-rtl-function.c (find_param_by_name,
	function_reader::parse_enum_value, function_reader::get_insn_by_uid):
	Likewise.
	* spellcheck.c (get_edit_distance_cutoff): Likewise.
	* tree-data-ref.c (create_ifn_alias_checks): Likewise.
	* tree.def (SWITCH_EXPR): Likewise.
	* selftest.c (assert_str_contains): Likewise.
	* ipa-param-manipulation.h (class ipa_param_body_adjustments):
	Likewise.
	* tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
	* tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
	* langhooks.h (struct lang_hooks_for_decls): Likewise.
	* ipa-prop.h (struct ipa_param_descriptor): Likewise.
	* tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
	Likewise.
	* tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
	* tree-ssa-reassoc.c (reassociate_bb): Likewise.
	* tree.c (component_ref_size): Likewise.
	* hsa-common.c (hsa_init_compilation_unit_data): Likewise.
	* gimple-ssa-sprintf.c (get_string_length, format_string,
	format_directive): Likewise.
	* omp-grid.c (grid_process_kernel_body_copy): Likewise.
	* input.c (string_concat_db::get_string_concatenation,
	test_lexer_string_locations_ucn4): Likewise.
	* cfgexpand.c (pass_expand::execute): Likewise.
	* gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
	maybe_diag_overlap): Likewise.
	* rtl.c (RTX_CODE_HWINT_P_1): Likewise.
	* shrink-wrap.c (spread_components): Likewise.
	* tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
	Likewise.
	* tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
	Likewise.
	* dwarf2out.c (dwarf2out_early_finish): Likewise.
	* gimple-ssa-store-merging.c: Likewise.
	* ira-costs.c (record_operand_costs): Likewise.
	* tree-vect-loop.c (vectorizable_reduction): Likewise.
	* target.def (dispatch): Likewise.
	(validate_dims, gen_ccmp_first): Fix up duplicated word issue
	in documentation text.
	* doc/tm.texi: Regenerated.
	* config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
	duplicated word issue in a comment.
	* config/i386/i386.c (ix86_test_loading_unspec): Likewise.
	* config/i386/i386-features.c (remove_partial_avx_dependency):
	Likewise.
	* config/msp430/msp430.c (msp430_select_section): Likewise.
	* config/gcn/gcn-run.c (load_image): Likewise.
	* config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
	* config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
	* config/aarch64/falkor-tag-collision-avoidance.c
	(single_dest_per_chain): Likewise.
	* config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
	* config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
	* config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
	* config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
	Likewise.
	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
	* config/rs6000/rs6000-logue.c
	(rs6000_emit_probe_stack_range_stack_clash): Likewise.
	* config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
	Fix various other issues in the comment.
c-family/
	* c-common.c (resolve_overloaded_builtin): Fix up duplicated word
	issue in a diagnostic message.
cp/
	* pt.c (tsubst): Fix up duplicated word issue in a diagnostic message.
	(lookup_template_class_1, tsubst_expr): Fix up duplicated word issue
	in a comment.
	* parser.c (cp_parser_statement, cp_parser_linkage_specification,
	cp_parser_placeholder_type_specifier,
	cp_parser_constraint_requires_parens): Likewise.
	* name-lookup.c (suggest_alternative_in_explicit_scope): Likewise.
fortran/
	* array.c (gfc_check_iter_variable): Fix up duplicated word issue
	in a comment.
	* arith.c (gfc_arith_concat): Likewise.
	* resolve.c (gfc_resolve_ref): Likewise.
	* frontend-passes.c (matmul_lhs_realloc): Likewise.
	* module.c (gfc_match_submodule, load_needed): Likewise.
	* trans-expr.c (gfc_init_se): Likewise.

16 files changed, 21 insertions, 21 deletions

diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index a661b25..f7a0893 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -2477,7 +2477,7 @@
 )
 
 ;; This is used for vec_duplicate<mode>s from memory, but can also
-;; be used by combine to optimize selects of a a vec_duplicate<mode>
+;; be used by combine to optimize selects of a vec_duplicate<mode>
 ;; with zero.
 (define_insn "sve_ld1r<mode>"
   [(set (match_operand:SVE_ALL 0 "register_operand" "=w")
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index b0cbb6e2..285341e 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -21296,7 +21296,7 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
     {
       base_off = 0x1000 - 1;
       /* We must still make sure that the base offset is aligned with respect
-	 to the address.  But it may may not be made any bigger.  */
+	 to the address.  But it may not be made any bigger.  */
       base_off -= (((base_off % msize) - (off_val_1 % msize)) + msize) % msize;
     }
 
diff --git a/gcc/config/aarch64/falkor-tag-collision-avoidance.c b/gcc/config/aarch64/falkor-tag-collision-avoidance.c
index b4e92a7..719df48 100644
--- a/gcc/config/aarch64/falkor-tag-collision-avoidance.c
+++ b/gcc/config/aarch64/falkor-tag-collision-avoidance.c
@@ -699,7 +699,7 @@ in_same_chain (rtx_insn *insn, rtx_insn *cand, unsigned regno)
 
 
 /* Callback function to traverse the tag map and drop loads that have the same
-   destination and and in the same chain of occurrence.  Routine always returns
+   destination and are in the same chain of occurrence.  Routine always returns
    true to allow traversal through all of TAG_MAP.  */
 bool
 single_dest_per_chain (const rtx &t ATTRIBUTE_UNUSED, insn_info_list_t *v,
diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c
index 08411b4..ffbb921 100644
--- a/gcc/config/fr30/fr30.c
+++ b/gcc/config/fr30/fr30.c
@@ -781,7 +781,7 @@ fr30_arg_partial_bytes (cumulative_args_t cum_v, const function_arg_info &arg)
      are sufficient argument registers available (or if no registers
      are needed because the parameter must be passed on the stack)
      then return zero, as this parameter does not require partial
-     register, partial stack stack space.  */
+     register, partial stack space.  */
   if (*cum + fr30_num_arg_regs (arg) <= FR30_NUM_ARG_REGS)
     return 0;
   
diff --git a/gcc/config/gcn/gcn-run.c b/gcc/config/gcn/gcn-run.c
index 7bec741..1e952e9 100644
--- a/gcc/config/gcn/gcn-run.c
+++ b/gcc/config/gcn/gcn-run.c
@@ -575,7 +575,7 @@ found_main:;
 		break;
 	      case R_AMDGPU_REL64:
 		/* FIXME
-		   LLD seems to emit REL64 where the the assembler has ABS64.
+		   LLD seems to emit REL64 where the assembler has ABS64.
 		   This is clearly wrong because it's not what the compiler
 		   is expecting.  Let's assume, for now, that it's a bug.
 		   In any case, GCN kernels are always self contained and
diff --git a/gcc/config/i386/i386-features.c b/gcc/config/i386/i386-features.c
index 6919c83..6528832 100644
--- a/gcc/config/i386/i386-features.c
+++ b/gcc/config/i386/i386-features.c
@@ -2224,7 +2224,7 @@ remove_partial_avx_dependency (void)
       loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
 
       /* Generate a vxorps at entry of the nearest dominator for basic
-	 blocks with conversions, which is in the the fake loop that
+	 blocks with conversions, which is in the fake loop that
 	 contains the whole function, so that there is only a single
 	 vxorps in the whole function.   */
       bb = nearest_common_dominator_for_set (CDI_DOMINATORS,
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index d1910b4..049ca4f 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -22928,7 +22928,7 @@ ix86_test_loading_unspec ()
   /* Verify that the two mems are thus treated as equal.  */
   ASSERT_TRUE (rtx_equal_p (dst, v0));
 
-  /* Verify the the insn is recognized.  */
+  /* Verify that the insn is recognized.  */
   ASSERT_NE(-1, recog_memoized (insn));
 
   /* Test of an UNSPEC_VOLATILE, which has its own enum values.  */
diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def
index 41b3d52..1776aba 100644
--- a/gcc/config/i386/x86-tune.def
+++ b/gcc/config/i386/x86-tune.def
@@ -70,7 +70,7 @@ DEF_TUNE (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY, "sse_partial_reg_dependency",
    upper part undefined.  */
 DEF_TUNE (X86_TUNE_SSE_SPLIT_REGS, "sse_split_regs", m_ATHLON_K8)
 
-/* X86_TUNE_PARTIAL_FLAG_REG_STALL: this flag disables use of of flags
+/* X86_TUNE_PARTIAL_FLAG_REG_STALL: this flag disables use of flags
    set by instructions affecting just some flags (in particular shifts).
    This is because Core2 resolves dependencies on whole flags register
    and such sequences introduce false dependency on previous instruction
diff --git a/gcc/config/msp430/msp430.c b/gcc/config/msp430/msp430.c
index 25d1916..cde14c8 100644
--- a/gcc/config/msp430/msp430.c
+++ b/gcc/config/msp430/msp430.c
@@ -1916,7 +1916,7 @@ msp430_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
     case SECCAT_RODATA_MERGE_CONST:
       return default_elf_select_section (decl, reloc, align);
 
-    /* The sections listed below are are not supported for MSP430.
+    /* The sections listed below are not supported for MSP430.
        They should not be generated, but in case they are, we use
        default_select_section so they get placed in sections
        the msp430 assembler and linker understand.  */
diff --git a/gcc/config/nds32/nds32-md-auxiliary.c b/gcc/config/nds32/nds32-md-auxiliary.c
index a9f930f..055a582 100644
--- a/gcc/config/nds32/nds32-md-auxiliary.c
+++ b/gcc/config/nds32/nds32-md-auxiliary.c
@@ -3304,12 +3304,12 @@ nds32_split_ashiftdi3 (rtx dst, rtx src, rtx shiftamount)
       ext_start = gen_reg_rtx (SImode);
 
       /*
-	 # In fact, we want to check shift amonut is great than or equal 32,
-	 # but in some corner case, the shift amount might be very large value,
-	 # however we've defined SHIFT_COUNT_TRUNCATED, so GCC think we've
-	 # handle that correctly without any truncate.
-	 # so check the the condition of (shiftamount & 32) is most
-	 # safe way to do.
+	 # In fact, we want to check shift amount is greater than or equal to
+	 # 32, but in some corner case, the shift amount might be very large
+	 # value, however we've defined SHIFT_COUNT_TRUNCATED, so GCC thinks
+	 # we've handled that correctly without any truncate.
+	 # So checking the condition of (shiftamount & 32) is the safest
+	 # way to do it.
 	 if (shiftamount & 32)
 	   dst_low_part = 0
 	   dst_high_part = src_low_part << shiftamount & 0x1f
diff --git a/gcc/config/nvptx/nvptx.c b/gcc/config/nvptx/nvptx.c
index 690822a..e3e84df 100644
--- a/gcc/config/nvptx/nvptx.c
+++ b/gcc/config/nvptx/nvptx.c
@@ -975,7 +975,7 @@ write_fn_proto_from_insn (std::stringstream &s, const char *name,
 }
 
 /* DECL is an external FUNCTION_DECL, make sure its in the fndecl hash
-   table and and write a ptx prototype.  These are emitted at end of
+   table and write a ptx prototype.  These are emitted at end of
    compilation.  */
 
 static void
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 8c1fbbf..e59eff9 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -397,7 +397,7 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags,
 	(e.g. ISA_2_1_MASKS, ISA_3_0_MASKS_SERVER) and for a list of
 	the specific flags that are associated with each of the cpu
 	choices that can be specified as the target of a -mcpu=target
-	compile option, or as the the target of a --with-cpu=target
+	compile option, or as the target of a --with-cpu=target
 	configure option.  Target flags that are specified in either
 	of these two ways are considered "implicit" since the flags
 	are not mentioned specifically by name.
diff --git a/gcc/config/rs6000/rs6000-logue.c b/gcc/config/rs6000/rs6000-logue.c
index fecc3e6..4cbf228 100644
--- a/gcc/config/rs6000/rs6000-logue.c
+++ b/gcc/config/rs6000/rs6000-logue.c
@@ -1547,7 +1547,7 @@ rs6000_emit_probe_stack_range_stack_clash (HOST_WIDE_INT orig_size,
 
   /* If explicitly requested,
        or the rounded size is not the same as the original size
-       or the the rounded size is greater than a page,
+       or the rounded size is greater than a page,
      then we will need a copy of the original stack pointer.  */
   if (rounded_size != orig_size
       || rounded_size > probe_interval
diff --git a/gcc/config/rs6000/rs6000-p8swap.c b/gcc/config/rs6000/rs6000-p8swap.c
index 067176d..3d5dc7d 100644
--- a/gcc/config/rs6000/rs6000-p8swap.c
+++ b/gcc/config/rs6000/rs6000-p8swap.c
@@ -1922,7 +1922,7 @@ replace_swapped_load_constant (swap_web_entry *insn_entry, rtx swap_insn)
     XEXP (new_mem, 0) = base_reg;
 
     /* Move the newly created insn ahead of the load insn.  */
-    /* The last insn is the the insn that forced new_mem into a register.  */
+    /* The last insn is the insn that forced new_mem into a register.  */
     rtx_insn *force_insn = get_last_insn ();
     /* Remove this insn from the end of the instruction sequence.  */
     remove_insn (force_insn);
diff --git a/gcc/config/rs6000/rs6000-string.c b/gcc/config/rs6000/rs6000-string.c
index 9cfa684..fe7177f 100644
--- a/gcc/config/rs6000/rs6000-string.c
+++ b/gcc/config/rs6000/rs6000-string.c
@@ -679,7 +679,7 @@ expand_cmp_vec_sequence (unsigned HOST_WIDE_INT bytes_to_compare,
 	 bnl 6,.Lmismatch
 
 	 For the P8 LE case, we use lxvd2x and compare full 16 bytes
-	 but then use use vgbbd and a shift to get two bytes with the
+	 but then use vgbbd and a shift to get two bytes with the
 	 information we need in the correct order.
 
 	 VEC/VSX compare sequence if TARGET_P9_VECTOR:
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 5798f92..2080c7d 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3956,7 +3956,7 @@ rs6000_option_override_internal (bool global_init_p)
     }
 
   /* Enable the default support for IEEE 128-bit floating point on Linux VSX
-     sytems.  In GCC 7, we would enable the the IEEE 128-bit floating point
+     sytems.  In GCC 7, we would enable the IEEE 128-bit floating point
      infrastructure (-mfloat128-type) but not enable the actual __float128 type
      unless the user used the explicit -mfloat128.  In GCC 8, we enable both
      the keyword as well as the type.  */