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authorJakub Jelinek <jakub@redhat.com>2022-02-12 11:17:41 +0100
committerJakub Jelinek <jakub@redhat.com>2022-02-12 11:17:41 +0100
commit0538d42cdd68f6b65d72ed7768f1d00ba44f8631 (patch)
tree41b472d762e23f8e06d22612b0a49728fc293e7a /gcc/config
parentedadc7e0510b703d9727cf5ff68d55d84bb95def (diff)
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i386: Fix up cvtsd2ss splitter [PR104502]
The following testcase ICEs, because AVX512F is enabled, AVX512VL is not, and the cvtsd2ss insn has %xmm0-15 as output operand and %xmm16-31 as input operand. For output operand %xmm16+ the splitter just gives up in such case, but for such input it just emits vmovddup which requires AVX512VL if either operand is EXT_REX_SSE_REG_P (when it is 128-bit). The following patch fixes it by treating that case like the pre-SSE3 output != input case - move the input to output and do everything on the output reg which is known to be < %xmm16. 2022-02-12 Jakub Jelinek <jakub@redhat.com> PR target/104502 * config/i386/i386.md (cvtsd2ss splitter): If operands[1] is xmm16+ and AVX512VL isn't available, move operands[1] to operands[0] first. * gcc.target/i386/pr104502.c: New test.
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/i386/i386.md4
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 74da0d4..8ffa641 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -4838,8 +4838,8 @@
movddup is available. */
if (REG_P (operands[1]))
{
- if (!TARGET_SSE3
- && REGNO (operands[0]) != REGNO (operands[1]))
+ if ((!TARGET_SSE3 && REGNO (operands[0]) != REGNO (operands[1]))
+ || (EXT_REX_SSE_REG_P (operands[1]) && !TARGET_AVX512VL))
{
rtx tmp = lowpart_subreg (DFmode, operands[0], SFmode);
emit_move_insn (tmp, operands[1]);