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authorKewen Lin <linkw@linux.ibm.com>2021-08-26 20:23:58 -0500
committerKewen Lin <linkw@linux.ibm.com>2021-08-26 20:23:58 -0500
commit26f5ea5e141cf1e40289dbc73ac21e85ad39fa57 (patch)
tree7108549f5a121bf09fd2e0032d3613c5cbe125f2 /gcc/config
parent2e64eec6719e596e7f095c977edcc63812be18a4 (diff)
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rs6000: Make some BIFs vectorized on P10
This patch is to add the support to make vectorizer able to vectorize some built-in function scalar versions on Power10. gcc/ChangeLog: * config/rs6000/rs6000.c (rs6000_builtin_md_vectorized_function): Add support for built-in functions MISC_BUILTIN_DIVWE, MISC_BUILTIN_DIVWEU, MISC_BUILTIN_DIVDE, MISC_BUILTIN_DIVDEU, P10_BUILTIN_CFUGED, P10_BUILTIN_CNTLZDM, P10_BUILTIN_CNTTZDM, P10_BUILTIN_PDEPD and P10_BUILTIN_PEXTD on Power10. gcc/testsuite/ChangeLog: * gcc.target/powerpc/dive-vectorize-1.c: New test. * gcc.target/powerpc/dive-vectorize-1.h: New test. * gcc.target/powerpc/dive-vectorize-2.c: New test. * gcc.target/powerpc/dive-vectorize-2.h: New test. * gcc.target/powerpc/dive-vectorize-run-1.c: New test. * gcc.target/powerpc/dive-vectorize-run-2.c: New test. * gcc.target/powerpc/p10-bifs-vectorize-1.c: New test. * gcc.target/powerpc/p10-bifs-vectorize-1.h: New test. * gcc.target/powerpc/p10-bifs-vectorize-run-1.c: New test.
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/rs6000/rs6000.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 05fb6aa..d02c1b6 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -5793,6 +5793,59 @@ rs6000_builtin_md_vectorized_function (tree fndecl, tree type_out,
default:
break;
}
+
+ machine_mode in_vmode = TYPE_MODE (type_in);
+ machine_mode out_vmode = TYPE_MODE (type_out);
+
+ /* Power10 supported vectorized built-in functions. */
+ if (TARGET_POWER10
+ && in_vmode == out_vmode
+ && VECTOR_UNIT_ALTIVEC_OR_VSX_P (in_vmode))
+ {
+ machine_mode exp_mode = DImode;
+ machine_mode exp_vmode = V2DImode;
+ enum rs6000_builtins bif;
+ switch (fn)
+ {
+ case MISC_BUILTIN_DIVWE:
+ case MISC_BUILTIN_DIVWEU:
+ exp_mode = SImode;
+ exp_vmode = V4SImode;
+ if (fn == MISC_BUILTIN_DIVWE)
+ bif = P10V_BUILTIN_DIVES_V4SI;
+ else
+ bif = P10V_BUILTIN_DIVEU_V4SI;
+ break;
+ case MISC_BUILTIN_DIVDE:
+ case MISC_BUILTIN_DIVDEU:
+ if (fn == MISC_BUILTIN_DIVDE)
+ bif = P10V_BUILTIN_DIVES_V2DI;
+ else
+ bif = P10V_BUILTIN_DIVEU_V2DI;
+ break;
+ case P10_BUILTIN_CFUGED:
+ bif = P10V_BUILTIN_VCFUGED;
+ break;
+ case P10_BUILTIN_CNTLZDM:
+ bif = P10V_BUILTIN_VCLZDM;
+ break;
+ case P10_BUILTIN_CNTTZDM:
+ bif = P10V_BUILTIN_VCTZDM;
+ break;
+ case P10_BUILTIN_PDEPD:
+ bif = P10V_BUILTIN_VPDEPD;
+ break;
+ case P10_BUILTIN_PEXTD:
+ bif = P10V_BUILTIN_VPEXTD;
+ break;
+ default:
+ return NULL_TREE;
+ }
+
+ if (in_mode == exp_mode && in_vmode == exp_vmode)
+ return rs6000_builtin_decls[bif];
+ }
+
return NULL_TREE;
}