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| author | Alejandro Martinez <alejandro.martinezvicente@arm.com> | 2019-06-18 08:09:00 +0000 |
|---|---|---|
| committer | Alejandro Martinez <alejandro@gcc.gnu.org> | 2019-06-18 08:09:00 +0000 |
| commit | bce29d65ebe1316d15ec7582a1d257ef1be163f7 (patch) | |
| tree | 5e31c8b01fcf9fd667adb0a813ad377f34961fae /gcc/config | |
| parent | 9553f0d2216d4475d4d1afaa748b6b02f56c057b (diff) | |
| download | gcc-bce29d65ebe1316d15ec7582a1d257ef1be163f7.zip gcc-bce29d65ebe1316d15ec7582a1d257ef1be163f7.tar.gz gcc-bce29d65ebe1316d15ec7582a1d257ef1be163f7.tar.bz2 | |
[Vectorizer] Support masking fold left reductions
This patch adds support in the vectorizer for masking fold left reductions.
This avoids the need to insert a conditional assignement with some identity
value.
From-SVN: r272407
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/aarch64/aarch64-sve.md | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index ba39134..806823f 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -2180,14 +2180,14 @@ ) ;; In-order FP reductions predicated with PTRUE. -(define_insn "*fold_left_plus_<mode>" +(define_insn "mask_fold_left_plus_<mode>" [(set (match_operand:<VEL> 0 "register_operand" "=w") - (unspec:<VEL> [(match_operand:<VPRED> 1 "register_operand" "Upl") - (match_operand:<VEL> 2 "register_operand" "0") - (match_operand:SVE_F 3 "register_operand" "w")] + (unspec:<VEL> [(match_operand:<VPRED> 3 "register_operand" "Upl") + (match_operand:<VEL> 1 "register_operand" "0") + (match_operand:SVE_F 2 "register_operand" "w")] UNSPEC_FADDA))] "TARGET_SVE" - "fadda\t%<Vetype>0, %1, %<Vetype>0, %3.<Vetype>" + "fadda\t%<Vetype>0, %3, %<Vetype>0, %2.<Vetype>" ) ;; Predicated form of the above in-order reduction. |