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authorSofiane Naci <sofiane.naci@arm.com>2013-03-26 14:41:11 +0000
committerSofiane Naci <sofiane@gcc.gnu.org>2013-03-26 14:41:11 +0000
commit795175513e9978d3141e8729da8dbff875e2d46c (patch)
tree86c578438adb26bdcd040a47e42694a16668b68f /gcc/config
parenta76213b9b371f5dd641bb7b44201d3a57945544d (diff)
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aarch64.c (aarch64_classify_address): Support PC-relative load in SI modes and above only.
* config/aarch64/aarch64.c (aarch64_classify_address): Support PC-relative load in SI modes and above only. From-SVN: r197107
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/aarch64/aarch64.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 343586e..d51b8d0 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -2926,9 +2926,10 @@ aarch64_classify_address (struct aarch64_address_info *info,
case CONST:
case SYMBOL_REF:
case LABEL_REF:
- /* load literal: pc-relative constant pool entry. */
+ /* load literal: pc-relative constant pool entry. Only supported
+ for SI mode or larger. */
info->type = ADDRESS_SYMBOLIC;
- if (outer_code != PARALLEL)
+ if (outer_code != PARALLEL && GET_MODE_SIZE (mode) >= 4)
{
rtx sym, addend;