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authorJeff Law <law@gcc.gnu.org>1999-09-06 23:49:18 -0600
committerJeff Law <law@gcc.gnu.org>1999-09-06 23:49:18 -0600
commitc5c7673583c6310e7f8e45704fdc4aadff33e393 (patch)
treef1a67b6ea75a7f0da3f06e0a1c60b213f4403168 /gcc/config/tahoe
parentad85216ece38be37dacbbb3fa7bb7db69aa33a4b (diff)
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Merge in gcc2-ss-010999
From-SVN: r29150
Diffstat (limited to 'gcc/config/tahoe')
-rw-r--r--gcc/config/tahoe/tahoe.c602
-rw-r--r--gcc/config/tahoe/tahoe.h6
-rw-r--r--gcc/config/tahoe/tahoe.md15
3 files changed, 308 insertions, 315 deletions
diff --git a/gcc/config/tahoe/tahoe.c b/gcc/config/tahoe/tahoe.c
index 53f77d6..89cdc3d 100644
--- a/gcc/config/tahoe/tahoe.c
+++ b/gcc/config/tahoe/tahoe.c
@@ -1,5 +1,10 @@
/* Subroutines for insn-output.c for Tahoe.
- Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc.
+ Copyright (C) 1989, 1991, 1997, 1998, 1999 Free Software Foundation, Inc.
+ Contributed by the University of Buffalo (Devon Bowen, Dale Wiles
+ and Kevin Zachmann.
+ Changes for HCX by Piet van Oostrum, University of Utrecht,
+ The Netherlands (piet@cs.ruu.nl)
+ Speed tweaks by Michael Tiemann (tiemann@lurch.stanford.edu).
This file is part of GNU CC.
@@ -18,9 +23,8 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-
#include "config.h"
-#include <stdio.h>
+#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@@ -32,21 +36,6 @@ Boston, MA 02111-1307, USA. */
#include "output.h"
#include "insn-attr.h"
-/*
- * File: output-tahoe.c
- *
- * Original port made at the University of Buffalo by Devon Bowen,
- * Dale Wiles and Kevin Zachmann.
- *
- * Changes for HCX by Piet van Oostrum,
- * University of Utrecht, The Netherlands (piet@cs.ruu.nl)
- *
- * Speed tweaks by Michael Tiemann (tiemann@lurch.stanford.edu).
- *
- * Mail bugs reports or fixes to: gcc@cs.buffalo.edu
- */
-
-
/* On tahoe, you have to go to memory to convert a register
from sub-word to word. */
@@ -61,13 +50,15 @@ extensible_operand (op, mode)
|| (GET_CODE (op) == SUBREG
&& GET_CODE (SUBREG_REG (op)) == REG))
&& tahoe_reg_conversion_loc == 0)
- tahoe_reg_conversion_loc = assign_stack_local (SImode, GET_MODE_SIZE (SImode));
+ tahoe_reg_conversion_loc
+ = assign_stack_local (SImode, GET_MODE_SIZE (SImode));
+
return general_operand (op, mode);
}
-/* most of the print_operand_address function was taken from the vax */
-/* since the modes are basically the same. I had to add a special case, */
-/* though, for symbol references with offsets. */
+/* Most of the print_operand_address function was taken from the VAX since
+ the modes are basically the same. I had to add a special case, though, for
+ symbol references with offsets. */
print_operand_address (file, addr)
FILE *file;
@@ -98,8 +89,8 @@ print_operand_address (file, addr)
break;
case PLUS:
- reg1 = 0; reg2 = 0;
- ireg = 0; breg = 0;
+ reg1 = 0, reg2 = 0;
+ ireg = 0, breg = 0;
offset = 0;
if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
@@ -112,38 +103,22 @@ print_operand_address (file, addr)
if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
|| GET_CODE (XEXP (addr, 0)) == MEM)
- {
- offset = XEXP (addr, 0);
- addr = XEXP (addr, 1);
- }
+ offset = XEXP (addr, 0), addr = XEXP (addr, 1);
else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
|| GET_CODE (XEXP (addr, 1)) == MEM)
- {
- offset = XEXP (addr, 1);
- addr = XEXP (addr, 0);
- }
+ offset = XEXP (addr, 1), addr = XEXP (addr, 0);
+
if (GET_CODE (addr) != PLUS)
;
else if (GET_CODE (XEXP (addr, 0)) == MULT)
- {
- reg1 = XEXP (addr, 0);
- addr = XEXP (addr, 1);
- }
+ reg1 = XEXP (addr, 0), addr = XEXP (addr, 1);
else if (GET_CODE (XEXP (addr, 1)) == MULT)
- {
- reg1 = XEXP (addr, 1);
- addr = XEXP (addr, 0);
- }
+ reg1 = XEXP (addr, 1), addr = XEXP (addr, 0);
else if (GET_CODE (XEXP (addr, 0)) == REG)
- {
- reg1 = XEXP (addr, 0);
- addr = XEXP (addr, 1);
- }
+ reg1 = XEXP (addr, 0), addr = XEXP (addr, 1);
else if (GET_CODE (XEXP (addr, 1)) == REG)
- {
- reg1 = XEXP (addr, 1);
- addr = XEXP (addr, 0);
- }
+ reg1 = XEXP (addr, 1), addr = XEXP (addr, 0);
+
if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT)
{
if (reg1 == 0)
@@ -152,39 +127,34 @@ print_operand_address (file, addr)
reg2 = addr;
addr = 0;
}
+
if (offset != 0)
{
- if (addr != 0) abort ();
+ if (addr != 0)
+ abort ();
+
addr = offset;
}
+
if (reg1 != 0 && GET_CODE (reg1) == MULT)
- {
- breg = reg2;
- ireg = reg1;
- }
+ breg = reg2, ireg = reg1;
else if (reg2 != 0 && GET_CODE (reg2) == MULT)
- {
- breg = reg1;
- ireg = reg2;
- }
+ breg = reg1, ireg = reg2;
else if (reg2 != 0 || GET_CODE (addr) == MEM)
- {
- breg = reg2;
- ireg = reg1;
- }
+ breg = reg2, ireg = reg1;
else
- {
- breg = reg1;
- ireg = reg2;
- }
+ breg = reg1, ireg = reg2;
+
if (addr != 0)
output_address (offset);
+
if (breg != 0)
{
if (GET_CODE (breg) != REG)
abort ();
fprintf (file, "(%s)", reg_name[REGNO (breg)]);
}
+
if (ireg != 0)
{
if (GET_CODE (ireg) == MULT)
@@ -200,8 +170,8 @@ print_operand_address (file, addr)
}
}
-/* Do a quick check and find out what the best way to do the */
-/* mini-move is. Could be a push or a move..... */
+/* Do a quick check and find out what the best way to do the mini-move is.
+ Could be a push or a move..... */
static char *
singlemove_string (operands)
@@ -209,65 +179,69 @@ singlemove_string (operands)
{
if (operands[1] == const0_rtx)
return "clrl %0";
+
if (push_operand (operands[0], SImode))
return "pushl %1";
+
return "movl %1,%0";
}
-/* given the rtx for an address, return true if the given */
-/* register number is used in the address somewhere. */
+/* Given the rtx for an address, return true if the given register number is
+ used in the address somewhere. */
-regisused(addr,regnum)
-rtx addr;
-int regnum;
+int
+regisused (addr, regnum)
+ rtx addr;
+ int regnum;
{
- if (GET_CODE(addr) == REG)
- if (REGNO(addr) == regnum)
- return (1);
- else
- return (0);
+ if (GET_CODE (addr) == REG)
+ return REGNO (addr) == regnum;
- if (GET_CODE(addr) == MEM)
- return regisused(XEXP(addr,0),regnum);
+ else if (GET_CODE (addr) == MEM)
+ return regisused (XEXP (addr, 0), regnum);
- if ((GET_CODE(addr) == MULT) || (GET_CODE(addr) == PLUS))
- return ((regisused(XEXP(addr,0),regnum)) ||
- (regisused(XEXP(addr,1),regnum)));
+ else if (GET_CODE (addr) == MULT || GET_CODE (addr) == PLUS)
+ return (regisused (XEXP (addr, 0), regnum)
+ || regisused (XEXP (addr, 1), regnum));
- return 0;
+ return 0;
}
-/* Given some rtx, traverse it and return the register used in a */
-/* index. If no index is found, return 0. */
+/* Given some rtx, traverse it and return the register used in a index. If no
+ index is found, return 0. */
rtx
-index_reg(addr)
-rtx addr;
+index_reg (addr)
+ rtx addr;
{
- rtx temp;
+ rtx temp;
- if (GET_CODE(addr) == MEM)
- return index_reg(XEXP(addr,0));
+ if (GET_CODE (addr) == MEM)
+ return index_reg (XEXP (addr, 0));
- if (GET_CODE(addr) == MULT)
- if (GET_CODE(XEXP(addr,0)) == REG)
- return XEXP(addr,0);
- else
- return XEXP(addr,1);
+ else if (GET_CODE (addr) == MULT)
+ {
+ if (GET_CODE (XEXP (addr, 0)) == REG)
+ return XEXP (addr, 0);
+ else
+ return XEXP (addr, 1);
+ }
- if (GET_CODE(addr) == PLUS)
- if (temp = index_reg(XEXP(addr,0)))
- return temp;
- else
- return index_reg(XEXP(addr,1));
+ else if (GET_CODE (addr) == PLUS)
+ {
+ if ((temp = index_reg (XEXP (addr, 0))) != 0)
+ return temp;
+ else
+ return index_reg (XEXP (addr, 1));
+ }
- return 0;
+ return 0;
}
-/* simulate the move double by generating two movl's. You have */
-/* to be careful about mixing modes here. */
+/* Simulate the move double by generating two movl's. We need to be careful
+ about mixing modes here. */
char *
output_move_double (operands)
@@ -285,21 +259,25 @@ output_move_double (operands)
if (REG_P (operands[0]))
optype0 = REGOP;
- else if ((GET_CODE(operands[0])==MEM) && (shftreg0=index_reg(operands[0])))
+ else if (GET_CODE (operands[0]) == MEM
+ && (shftreg0 = index_reg (operands[0])) != 0)
optype0 = INDOP;
else if (offsettable_memref_p (operands[0]))
optype0 = OFFSOP;
- else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) {
- optype0 = PUSHOP;
- dohighfirst++;
- } else if (GET_CODE (operands[0]) == MEM)
+ else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
+ {
+ optype0 = PUSHOP;
+ dohighfirst++;
+ }
+ else if (GET_CODE (operands[0]) == MEM)
optype0 = MEMOP;
else
optype0 = RNDOP;
if (REG_P (operands[1]))
optype1 = REGOP;
- else if ((GET_CODE(operands[1])==MEM) && (shftreg1=index_reg(operands[1])))
+ else if (GET_CODE (operands[1]) == MEM
+ && (shftreg1 = index_reg (operands[1])) !+ 0)
optype1 = INDOP;
else if (offsettable_memref_p (operands[1]))
optype1 = OFFSOP;
@@ -312,214 +290,233 @@ output_move_double (operands)
else
optype1 = RNDOP;
- /* set up for the high byte move for operand zero */
+ /* Set up for the high byte move for operand zero */
- switch (optype0) {
-
- /* if it's a register, just use the next highest in the */
- /* high address move. */
-
- case REGOP : latehalf[0] = gen_rtx (REG,SImode,REGNO(operands[0])+1);
- break;
-
- /* for an offsettable address, use the gcc function to */
- /* modify the operand to get an offset of 4 higher for */
- /* the second move. */
-
- case OFFSOP : latehalf[0] = adj_offsettable_operand (operands[0], 4);
- break;
-
- /* if the operand is MEMOP type, it must be a pointer */
- /* to a pointer. So just remember to increase the mem */
- /* location and use the same operand. */
-
- case MEMOP : latehalf[0] = operands[0];
- addreg0 = XEXP(operands[0],0);
- break;
+ switch (optype0)
+ {
+ /* If it's a register, just use the next highest in the high address
+ move. */
+ case REGOP:
+ latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
+ break;
- /* if we're dealing with a push instruction, just leave */
- /* the operand alone since it auto-increments. */
+ /* For an offsettable address, use the GCC function to modify the
+ operand to get an offset of 4 higher for the second move. */
+ case OFFSOP:
+ latehalf[0] = adj_offsettable_operand (operands[0], 4);
+ break;
- case PUSHOP : latehalf[0] = operands[0];
- break;
+ /* If the operand is MEMOP type, it must be a pointer to a pointer.
+ So just remember to increase the mem location and use the same
+ operand. */
+ case MEMOP:
+ latehalf[0] = operands[0];
+ addreg0 = XEXP(operands[0],0);
+ break;
- /* YUCK! Indexed addressing!! If the address is considered */
- /* offsettable, go use the offset in the high part. Otherwise */
- /* find what exactly is being added to the multiplication. If */
- /* it's a mem reference, increment that with the high part */
- /* being unchanged to cause the shift. If it's a reg, do the */
- /* same. If you can't identify it, abort. Remember that the */
- /* shift register was already set during identification. */
+ /* If we're dealing with a push instruction, just leave the operand
+ alone since it auto-increments. */
+ case PUSHOP:
+ latehalf[0] = operands[0];
+ break;
- case INDOP : if (offsettable_memref_p(operands[0])) {
- latehalf[0] = adj_offsettable_operand(operands[0],4);
- break;
- }
+ /* Indexed addressing. If the address is considered offsettable, use
+ the offset in the high part. Otherwise find what exactly is being
+ added to the multiplication. If it's a mem reference, increment that
+ with the high part being unchanged to cause the shift. If it's a
+ reg, do the same. If we can't identify it, abort. Remember that the
+ shift register was already set during identification. */
- latehalf[0] = operands[0];
+ case INDOP:
+ if (offsettable_memref_p (operands[0]))
+ {
+ latehalf[0] = adj_offsettable_operand (operands[0], 4);
+ break;
+ }
- temp0 = XEXP(XEXP(operands[0],0),0);
- if (GET_CODE(temp0) == MULT) {
- temp1 = temp0;
- temp0 = XEXP(XEXP(operands[0],0),1);
- } else {
- temp1 = XEXP(XEXP(operands[0],0),1);
- if (GET_CODE(temp1) != MULT)
- abort();
- }
+ latehalf[0] = operands[0];
- if (GET_CODE(temp0) == MEM)
- addreg0 = temp0;
- else if (GET_CODE(temp0) == REG)
- addreg0 = temp0;
- else
- abort();
+ temp0 = XEXP (XEXP (operands[0], 0), 0);
+ if (GET_CODE(temp0) == MULT)
+ {
+ temp1 = temp0;
+ temp0 = XEXP (XEXP (operands[0], 0), 1);
+ }
+ else
+ {
+ temp1 = XEXP (XEXP (operands[0], 0), 1);
+ if (GET_CODE (temp1) != MULT)
+ abort();
+ }
- break;
+ if (GET_CODE (temp0) == MEM)
+ addreg0 = temp0;
+ else if (GET_CODE (temp0) == REG)
+ addreg0 = temp0;
+ else
+ abort();
- /* if we don't know the operand type, print a friendly */
- /* little error message... 8-) */
+ break;
- case RNDOP :
- default : abort();
+ case RNDOP:
+ default:
+ abort();
}
- /* do the same setup for operand one */
+ /* Do the same setup for operand one. */
- switch (optype1) {
+ switch (optype1)
+ {
+ case REGOP:
+ latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
+ break;
- case REGOP : latehalf[1] = gen_rtx(REG,SImode,REGNO(operands[1])+1);
- break;
+ case OFFSOP:
+ latehalf[1] = adj_offsettable_operand (operands[1], 4);
+ break;
- case OFFSOP : latehalf[1] = adj_offsettable_operand (operands[1], 4);
- break;
+ case MEMOP:
+ latehalf[1] = operands[1];
+ addreg1 = XEXP (operands[1], 0);
+ break;
- case MEMOP : latehalf[1] = operands[1];
- addreg1 = XEXP(operands[1],0);
- break;
+ case POPOP:
+ latehalf[1] = operands[1];
+ break;
- case POPOP : latehalf[1] = operands[1];
- break;
+ case INDOP:
+ if (offsettable_memref_p (operands[1]))
+ {
+ latehalf[1] = adj_offsettable_operand (operands[1], 4);
+ break;
+ }
- case INDOP : if (offsettable_memref_p(operands[1])) {
- latehalf[1] = adj_offsettable_operand(operands[1],4);
- break;
- }
+ latehalf[1] = operands[1];
- latehalf[1] = operands[1];
+ temp0 = XEXP (XEXP (operands[1], 0), 0);
+ if (GET_CODE (temp0) == MULT)
+ {
+ temp1 = temp0;
+ temp0 = XEXP (XEXP (operands[1], 0), 1);
+ }
+ else
+ {
+ temp1 = XEXP (XEXP (operands[1], 0), 1);
+ if (GET_CODE (temp1) != MULT)
+ abort();
+ }
- temp0 = XEXP(XEXP(operands[1],0),0);
- if (GET_CODE(temp0) == MULT) {
- temp1 = temp0;
- temp0 = XEXP(XEXP(operands[1],0),1);
- } else {
- temp1 = XEXP(XEXP(operands[1],0),1);
- if (GET_CODE(temp1) != MULT)
- abort();
- }
+ if (GET_CODE (temp0) == MEM)
+ addreg1 = temp0;
+ else if (GET_CODE (temp0) == REG)
+ addreg1 = temp0;
+ else
+ abort();
+ break;
- if (GET_CODE(temp0) == MEM)
- addreg1 = temp0;
- else if (GET_CODE(temp0) == REG)
- addreg1 = temp0;
- else
- abort();
+ case CNSTOP:
+ if (GET_CODE (operands[1]) == CONST_DOUBLE)
+ split_double (operands[1], &operands[1], &latehalf[1]);
+ else if (CONSTANT_P (operands[1]))
+ latehalf[1] = const0_rtx;
+ else
+ abort ();
+ break;
- break;
+ case RNDOP:
+ default:
+ abort ();
+ }
- case CNSTOP :
- if (GET_CODE (operands[1]) == CONST_DOUBLE)
- split_double (operands[1], &operands[1], &latehalf[1]);
- else if (CONSTANT_P (operands[1]))
- latehalf[1] = const0_rtx;
- else abort ();
- break;
- case RNDOP :
- default : abort();
- }
+ /* Double the register used for shifting in both of the operands but make
+ sure the same register isn't doubled twice! */
+ if (shftreg0 != 0 && shftreg1 != 0 && rtx_equal_p (shftreg0, shftreg1))
+ output_asm_insn ("addl2 %0,%0", &shftreg0);
+ else
+ {
+ if (shftreg0 != 0)
+ output_asm_insn ("addl2 %0,%0", &shftreg0);
+ if (shftreg1!= 0)
+ output_asm_insn ("addl2 %0,%0", &shftreg1);
+ }
- /* double the register used for shifting in both of the operands */
- /* but make sure the same register isn't doubled twice! */
+ /* If the destination is a register and that register is needed in the
+ source addressing mode, swap the order of the moves since we don't want
+ this destroyed til last. If both regs are used, not much we can do, so
+ abort. If these becomes a problem, maybe we can do it on the stack? */
- if (shftreg0 && shftreg1 && (rtx_equal_p(shftreg0,shftreg1)))
- output_asm_insn("addl2 %0,%0", &shftreg0);
- else {
- if (shftreg0)
- output_asm_insn("addl2 %0,%0", &shftreg0);
- if (shftreg1)
- output_asm_insn("addl2 %0,%0", &shftreg1);
- }
+ if (GET_CODE (operands[0]) == REG
+ && regisused (operands[1], REGNO (operands[0])))
+ {
+ if (regisused (latehalf[1], REGNO(latehalf[0])))
+ ;
+ else
+ dohighfirst++;
+ }
+
+ /* If we're pushing, do the high address part first. */
- /* if the destination is a register and that register is needed in */
- /* the source addressing mode, swap the order of the moves since we */
- /* don't want this destroyed til last. If both regs are used, not */
- /* much we can do, so abort. If these becomes a problem, maybe we */
- /* can do it on the stack? */
-
- if (GET_CODE(operands[0])==REG && regisused(operands[1],REGNO(operands[0])))
- if (regisused(latehalf[1],REGNO(latehalf[0])))
- 8;
- else
- dohighfirst++;
-
- /* if we're pushing, do the high address part first. */
-
- if (dohighfirst) {
-
- if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1)))
- output_asm_insn("addl2 $4,%0", &addreg0);
- else {
- if (addreg0)
- output_asm_insn("addl2 $4,%0", &addreg0);
- if (addreg1)
- output_asm_insn("addl2 $4,%0", &addreg1);
+ if (dohighfirst)
+ {
+ if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1))
+ output_asm_insn ("addl2 $4,%0", &addreg0);
+ else
+ {
+ if (addreg0 != 0)
+ output_asm_insn ("addl2 $4,%0", &addreg0);
+ if (addreg1 != 0)
+ output_asm_insn ("addl2 $4,%0", &addreg1);
}
- output_asm_insn(singlemove_string(latehalf), latehalf);
+ output_asm_insn (singlemove_string (latehalf), latehalf);
- if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1)))
- output_asm_insn("subl2 $4,%0", &addreg0);
- else {
- if (addreg0)
- output_asm_insn("subl2 $4,%0", &addreg0);
- if (addreg1)
- output_asm_insn("subl2 $4,%0", &addreg1);
+ if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1))
+ output_asm_insn ("subl2 $4,%0", &addreg0);
+ else
+ {
+ if (addreg0 != 0)
+ output_asm_insn ("subl2 $4,%0", &addreg0);
+ if (addreg1 != 0)
+ output_asm_insn ("subl2 $4,%0", &addreg1);
}
- return singlemove_string(operands);
- }
+ return singlemove_string (operands);
+ }
- output_asm_insn(singlemove_string(operands), operands);
+ output_asm_insn (singlemove_string(operands), operands);
- if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1)))
- output_asm_insn("addl2 $4,%0", &addreg0);
- else {
- if (addreg0)
- output_asm_insn("addl2 $4,%0", &addreg0);
- if (addreg1)
- output_asm_insn("addl2 $4,%0", &addreg1);
- }
+ if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1))
+ output_asm_insn ("addl2 $4,%0", &addreg0);
+ else
+ {
+ if (addreg0 != 0)
+ output_asm_insn ("addl2 $4,%0", &addreg0);
+ if (addreg1 != 0)
+ output_asm_insn ("addl2 $4,%0", &addreg1);
+ }
- output_asm_insn(singlemove_string(latehalf), latehalf);
+ output_asm_insn (singlemove_string (latehalf), latehalf);
- if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1)))
- output_asm_insn("subl2 $4,%0", &addreg0);
- else {
- if (addreg0)
- output_asm_insn("subl2 $4,%0", &addreg0);
- if (addreg1)
- output_asm_insn("subl2 $4,%0", &addreg1);
- }
+ if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p(addreg0, addreg1))
+ output_asm_insn ("subl2 $4,%0", &addreg0);
+ else
+ {
+ if (addreg0 != 0)
+ output_asm_insn ("subl2 $4,%0", &addreg0);
+ if (addreg1 != 0)
+ output_asm_insn ("subl2 $4,%0", &addreg1);
+ }
- if (shftreg0 && shftreg1 && (rtx_equal_p(shftreg0,shftreg1)))
- output_asm_insn("shar $1,%0,%0", &shftreg0);
- else {
- if (shftreg0)
- output_asm_insn("shar $1,%0,%0", &shftreg0);
- if (shftreg1)
- output_asm_insn("shar $1,%0,%0", &shftreg1);
+ if (shftreg0 != 0 && shftreg1 != 0 && rtx_equal_p (shftreg0, shftreg1))
+ output_asm_insn ("shar $1,%0,%0", &shftreg0);
+ else
+ {
+ if (shftreg0 != 0)
+ output_asm_insn ("shar $1,%0,%0", &shftreg0);
+ if (shftreg1 != 0)
+ output_asm_insn ("shar $1,%0,%0", &shftreg1);
}
return "";
@@ -533,33 +530,32 @@ output_move_double (operands)
int
tahoe_cmp_check (insn, op, max)
-rtx insn, op; int max;
+ rtx insn, op;
+ int max;
{
+ register rtx next = NEXT_INSN (insn);
+
if (GET_CODE (op) == CONST_INT
- && ( INTVAL (op) < 0 || INTVAL (op) > max ))
- return 0;
+ && (INTVAL (op) < 0 || INTVAL (op) > max))
+ return 0;
+
+ if (GET_RTX_CLASS (GET_CODE (next)) == 'i')
{
- register rtx next = NEXT_INSN (insn);
-
- if ((GET_CODE (next) == JUMP_INSN
- || GET_CODE (next) == INSN
- || GET_CODE (next) == CALL_INSN))
- {
- next = PATTERN (next);
- if (GET_CODE (next) == SET
- && SET_DEST (next) == pc_rtx
- && GET_CODE (SET_SRC (next)) == IF_THEN_ELSE)
- switch (GET_CODE (XEXP (SET_SRC (next), 0)))
- {
- case EQ:
- case NE:
- case LTU:
- case GTU:
- case LEU:
- case GEU:
- return 1;
- }
- }
+ next = PATTERN (next);
+ if (GET_CODE (next) == SET
+ && SET_DEST (next) == pc_rtx
+ && GET_CODE (SET_SRC (next)) == IF_THEN_ELSE)
+ switch (GET_CODE (XEXP (SET_SRC (next), 0)))
+ {
+ case EQ:
+ case NE:
+ case LTU:
+ case GTU:
+ case LEU:
+ case GEU:
+ return 1;
+ }
}
- return 0;
+
+ return 0;
}
diff --git a/gcc/config/tahoe/tahoe.h b/gcc/config/tahoe/tahoe.h
index 8306331..b18e8ab 100644
--- a/gcc/config/tahoe/tahoe.h
+++ b/gcc/config/tahoe/tahoe.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Tahoe version.
- Copyright (C) 1989, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
+ Copyright (C) 1989, 93, 94, 95, 96, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -331,11 +331,11 @@ enum reg_class {NO_REGS,GENERAL_REGS,FPP_REG,ALL_REGS,LIM_REG_CLASSES};
/* function values for all types are returned in register 0 */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
+ gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
/* library routines also return things in reg 0 */
-#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
+#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
/* Tahoe doesn't return structures in a reentrant way */
diff --git a/gcc/config/tahoe/tahoe.md b/gcc/config/tahoe/tahoe.md
index 021c1b0..8ed0649 100644
--- a/gcc/config/tahoe/tahoe.md
+++ b/gcc/config/tahoe/tahoe.md
@@ -1,5 +1,5 @@
;; Machine description for GNU compiler, Tahoe version
-;; Copyright (C) 1989, 1994, 1996, 1997 Free Software Foundation, Inc.
+;; Copyright (C) 1989, 1994, 96-98, 1999 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@@ -1591,7 +1591,7 @@
""
"*
{
- operands[1] = GEN_INT ((INTVAL (operands[1]) + 4));
+ operands[1] = GEN_INT (INTVAL (operands[1]) + 4);
if (GET_CODE(operands[0]) == MEM
&& CONSTANT_ADDRESS_P (XEXP(operands[0], 0))
&& INTVAL (operands[1]) < 64)
@@ -1609,7 +1609,7 @@
""
"*
{
- operands[2] = GEN_INT ((INTVAL (operands[2]) + 4));
+ operands[2] = GEN_INT (INTVAL (operands[2]) + 4));
if (GET_CODE(operands[1]) == MEM
&& CONSTANT_ADDRESS_P (XEXP(operands[1], 0))
&& INTVAL (operands[2]) < 64)
@@ -2056,8 +2056,7 @@
; && exact_log2 (INTVAL (operands[1])) >= 0"
; "*
;{
-; operands[1]
-; = GEN_INT (exact_log2 (INTVAL (operands[1])));
+; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1])));
; return \"bbs %1,%0,%l2\";
;}")
;
@@ -2073,8 +2072,7 @@
; && exact_log2 (INTVAL (operands[1])) >= 0"
; "*
;{
-; operands[1]
-; = GEN_INT (exact_log2 (INTVAL (operands[1])));
+; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1])));
; return \"bbc %1,%0,%l2\";
;}")
;
@@ -2090,8 +2088,7 @@
; && exact_log2 (INTVAL (operands[1])) >= 0"
; "*
;{
-; operands[1]
-; = GEN_INT (exact_log2 (INTVAL (operands[1])));
+; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1])));
; return \"bbc %1,%0,%l2\";
;}")
;