[1/77] Add an E_ prefix to mode names

Later patches will add wrapper types for specific classes
of mode.  E.g. SImode will be a scalar_int_mode, SFmode will be a
scalar_float_mode, etc.  This patch prepares for that change by adding
an E_ prefix to the mode enum values.  It also adds #defines that map
the unprefixed names to the prefixed names; e.g:

  #define QImode E_QImode

Later patches will change this to use things like scalar_int_mode
where appropriate.

The patch continues to use enum values to initialise static data.
This isn't necessary for correctness, but it cuts down on the amount
of load-time initialisation and shouldn't have any downsides.

The patch also changes things like:

  cmp_mode == DImode ? DFmode : DImode

to:

  cmp_mode == DImode ? E_DFmode : E_DImode

This is because DImode and DFmode will eventually be different
classes, so the original ?: wouldn't be well-formed.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* genmodes.c (mode_size_inline): Add an E_ prefix to mode names.
	(mode_nunits_inline): Likewise.
	(mode_inner_inline): Likewise.
	(mode_unit_size_inline): Likewise.
	(mode_unit_precision_inline): Likewise.
	(emit_insn_modes_h): Likewise.  Also emit a #define of the
	unprefixed name.
	(emit_mode_wider): Add an E_ prefix to mode names.
	(emit_mode_complex): Likewise.
	(emit_mode_inner): Likewise.
	(emit_mode_adjustments): Likewise.
	(emit_mode_int_n): Likewise.
	* config/aarch64/aarch64-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP)
	(v2si_UP, v2sf_UP, v1df_UP, di_UP, df_UP, v16qi_UP, v8hi_UP, v8hf_UP)
	(v4si_UP, v4sf_UP, v2di_UP, v2df_UP, ti_UP, oi_UP, ci_UP, xi_UP)
	(si_UP, sf_UP, hi_UP, hf_UP, qi_UP): Likewise.
	(CRC32_BUILTIN, ENTRY): Likewise.
	* config/aarch64/aarch64.c (aarch64_push_regs): Likewise.
	(aarch64_pop_regs): Likewise.
	(aarch64_process_components): Likewise.
	* config/alpha/alpha.c (alpha_emit_conditional_move): Likewise.
	* config/arm/arm-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP, v2si_UP)
	(v2sf_UP, di_UP, v16qi_UP, v8hi_UP, v8hf_UP, v4si_UP, v4sf_UP)
	(v2di_UP, ti_UP, ei_UP, oi_UP, hf_UP, si_UP, void_UP): Likewise.
	* config/arm/arm.c (arm_init_libfuncs): Likewise.
	* config/i386/i386-builtin-types.awk (ix86_builtin_type_vect_mode):
	Likewise.
	* config/i386/i386-builtin.def (pcmpestr): Likewise.
	(pcmpistr): Likewise.
	* config/microblaze/microblaze.c (double_memory_operand): Likewise.
	* config/mmix/mmix.c (mmix_output_condition): Likewise.
	* config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok):
	Likewise.
	* config/rl78/rl78.c (mduc_regs): Likewise.
	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise.
	(htm_expand_builtin): Likewise.
	* config/sh/sh.h (REGISTER_NATURAL_MODE): Likewise.
	* config/sparc/sparc.c (emit_save_or_restore_regs): Likewise.
	* config/xtensa/xtensa.c (print_operand): Likewise.
	* expmed.h (NUM_MODE_PARTIAL_INT): Likewise.
	(NUM_MODE_VECTOR_INT): Likewise.
	* genoutput.c (null_operand): Likewise.
	(output_operand_data): Likewise.
	* genrecog.c (print_parameter_value): Likewise.
	* lra.c (debug_operand_data): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251452

1 files changed, 3 insertions, 3 deletions

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 911cb34..5885288 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -5512,17 +5512,17 @@ emit_save_or_restore_regs (unsigned int low, unsigned int high, rtx base,
 
 	  if (reg0 && reg1)
 	    {
-	      mode = SPARC_INT_REG_P (i) ? DImode : DFmode;
+	      mode = SPARC_INT_REG_P (i) ? E_DImode : E_DFmode;
 	      regno = i;
 	    }
 	  else if (reg0)
 	    {
-	      mode = SPARC_INT_REG_P (i) ? SImode : SFmode;
+	      mode = SPARC_INT_REG_P (i) ? E_SImode : E_SFmode;
 	      regno = i;
 	    }
 	  else if (reg1)
 	    {
-	      mode = SPARC_INT_REG_P (i) ? SImode : SFmode;
+	      mode = SPARC_INT_REG_P (i) ? E_SImode : E_SFmode;
 	      regno = i + 1;
 	      offset += 4;
 	    }