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| author | Kazu Hirata <kazu@cs.umass.edu> | 2004-09-18 19:19:40 +0000 |
|---|---|---|
| committer | Kazu Hirata <kazu@gcc.gnu.org> | 2004-09-18 19:19:40 +0000 |
| commit | 112cdef5e66fccce5475fabb5317805e012dc212 (patch) | |
| tree | b5db05c8d76e4eb55fa3eba83d2a2eac1b12bf33 /gcc/config/sparc/sparc.h | |
| parent | ad97f4bed6ac21187cce4f9267279d13ae56ecab (diff) | |
| download | gcc-112cdef5e66fccce5475fabb5317805e012dc212.zip gcc-112cdef5e66fccce5475fabb5317805e012dc212.tar.gz gcc-112cdef5e66fccce5475fabb5317805e012dc212.tar.bz2 | |
darwin-c.c, [...]: Fix comment typos.
* config/darwin-c.c, config/arc/arc.c, config/arc/arc.md,
config/arm/README-interworking, config/arm/arm-cores.def,
config/arm/arm.c, config/arm/arm.h, config/arm/pe.c,
config/arm/vfp.md, config/c4x/c4x.c, config/c4x/c4x.h,
config/cris/cris.c, config/cris/cris.h, config/fr30/fr30.c,
config/fr30/fr30.h, config/fr30/fr30.md, config/frv/frv.c,
config/frv/frv.md, config/i386/winnt.c,
config/ia64/unwind-ia64.c, config/iq2000/iq2000.c,
config/iq2000/iq2000.h, config/m68hc11/m68hc11.c,
config/m68hc11/m68hc11.md, config/m68k/m68k.c,
config/mcore/mcore.c, config/mips/mips.h,
config/mn10300/mn10300.md, config/pa/pa.c,
config/pa/pa64-regs.h, config/pdp11/pdp11.c,
config/rs6000/rs6000.c, config/sh/symbian.c,
config/sparc/sparc.h: Fix comment typos. Follow spelling
conventions.
From-SVN: r87706
Diffstat (limited to 'gcc/config/sparc/sparc.h')
| -rw-r--r-- | gcc/config/sparc/sparc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 562a10d..5cf5201 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -884,7 +884,7 @@ if (TARGET_ARCH64 \ SPARC has 32 integer registers and 32 floating point registers. 64 bit SPARC has 32 additional fp regs, but the odd numbered ones are not accessible. We still account for them to simplify register computations - (eg: in CLASS_MAX_NREGS). There are also 4 fp condition code registers, so + (e.g.: in CLASS_MAX_NREGS). There are also 4 fp condition code registers, so 32+32+32+4 == 100. Register 100 is used as the integer condition code register. Register 101 is used as the soft frame pointer register. */ |