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| author | Richard Henderson <rth@gcc.gnu.org> | 1999-08-02 15:58:04 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 1999-08-02 15:58:04 -0700 |
| commit | 1cb36a981d95f29f37fef511b88a04c48cfa90cc (patch) | |
| tree | a4298750822ac9991259b44746e7970194b4f6a4 /gcc/config/sparc/sparc.c | |
| parent | e76d23764b387e9636b5d568b62531019f7f2273 (diff) | |
| download | gcc-1cb36a981d95f29f37fef511b88a04c48cfa90cc.zip gcc-1cb36a981d95f29f37fef511b88a04c48cfa90cc.tar.gz gcc-1cb36a981d95f29f37fef511b88a04c48cfa90cc.tar.bz2 | |
Jakub Jelinek <jj@ultra.linux.cz>
* config/sparc/sparc.h (ASM_DECLARE_REGISTER_GLOBAL): New macro.
(RTX_OK_FOR_OLO10): Likewise.
(GO_IF_LEGITIMATE_ADDRESS): If assembler supports offsetable
%lo(), allow it in addresses...
(PRINT_OPERAND_ADDRESS): ... and print it appropriately.
* config/sparc/sparc.md (sethi_di_medlow_embmedany_pic): sethi %lo()
does not make sense.
* config/sparc/sparc.c (sparc_hard_reg_printed): New array.
(sparc_output_scratch_registers): New function.
(output_function_prologue, sparc_flat_output_function_prologue): Use
it.
* varasm.c (make_decl_rtl): Use ASM_DECLARE_REGISTER_GLOBAL if
defined.
* tm.texi (ASM_DECLARE_REGISTER_GLOBAL): Document it.
* configure.in: Add check for .register pseudo-op support in as and
check for offsetable %lo().
* acconfig.h: Add templates for the above checks.
* configure: Regenerate.
Richard Henderson <rth@cygnus.com>
* sparc/linux64.h (TARGET_DEFAULT): Remove MASK_APP_REGS.
* sparc/sol2-sld-64.h (TARGET_DEFAULT): Likewise.
* sparc/sol2.h (TARGET_DEFAULT): Likewise.
From-SVN: r28414
Diffstat (limited to 'gcc/config/sparc/sparc.c')
| -rw-r--r-- | gcc/config/sparc/sparc.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index e3cebf3..1d3bbc7 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -141,6 +141,8 @@ int sparc_align_loops; int sparc_align_jumps; int sparc_align_funcs; +char sparc_hard_reg_printed[8]; + struct sparc_cpu_select sparc_select[] = { /* switch name, tune arch */ @@ -3108,6 +3110,32 @@ build_big_number (file, num, reg) } } +/* Output any necessary .register pseudo-ops. */ +void +sparc_output_scratch_registers (file) + FILE *file; +{ +#ifdef HAVE_AS_REGISTER_PSEUDO_OP + int i; + + if (TARGET_ARCH32) + return; + + /* Check if %g[2367] were used without + .register being printed for them already. */ + for (i = 2; i < 8; i++) + { + if (regs_ever_live [i] + && ! sparc_hard_reg_printed [i]) + { + sparc_hard_reg_printed [i] = 1; + fprintf (file, "\t.register\t%%g%d, #scratch\n", i); + } + if (i == 3) i = 5; + } +#endif +} + /* Output code for the function prologue. */ void @@ -3116,6 +3144,8 @@ output_function_prologue (file, size, leaf_function) int size; int leaf_function; { + sparc_output_scratch_registers (file); + /* Need to use actual_fsize, since we are also allocating space for our callee (and our own register save area). */ actual_fsize = compute_frame_size (size, leaf_function); @@ -5849,6 +5879,8 @@ sparc_flat_output_function_prologue (file, size) char *sp_str = reg_names[STACK_POINTER_REGNUM]; unsigned long gmask = current_frame_info.gmask; + sparc_output_scratch_registers (file); + /* This is only for the human reader. */ fprintf (file, "\t%s#PROLOGUE# 0\n", ASM_COMMENT_START); fprintf (file, "\t%s# vars= %ld, regs= %d/%d, args= %d, extra= %ld\n", |