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author | Eric Botcazou <ebotcazou@libertysurf.fr> | 2004-05-31 23:34:26 +0200 |
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committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2004-05-31 21:34:26 +0000 |
commit | a4a90b847aac34b2cbede88ffeef45343214d066 (patch) | |
tree | d91d56afe424dca67642ecfc22d5d221aeaf7799 /gcc/config/sparc/sparc.c | |
parent | c8b2e872a83dd3869ffc4443201a1f3096bc3a6c (diff) | |
download | gcc-a4a90b847aac34b2cbede88ffeef45343214d066.zip gcc-a4a90b847aac34b2cbede88ffeef45343214d066.tar.gz gcc-a4a90b847aac34b2cbede88ffeef45343214d066.tar.bz2 |
re PR target/15693 (ICE - unrecognizable insn)
PR target/15693
* config/sparc/sparc.c (compare_operand): New predicate.
* config/sparc/sparc.h (PREDICATE_CODES): Add it.
* config/sparc/sparc.md (cmpsi expander): Use it. If the first
operand is a ZERO_EXTRACT and the second operand is not zero,
force the former to a register.
(cmpdi expander): Likewise.
From-SVN: r82500
Diffstat (limited to 'gcc/config/sparc/sparc.c')
-rw-r--r-- | gcc/config/sparc/sparc.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 278ca9a..30fbb87 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1348,6 +1348,32 @@ input_operand (rtx op, enum machine_mode mode) return 0; } +/* Return 1 if OP is valid for the lhs of a compare insn. */ + +int +compare_operand (rtx op, enum machine_mode mode) +{ + if (GET_CODE (op) == ZERO_EXTRACT) + return (register_operand (XEXP (op, 0), mode) + && small_int_or_double (XEXP (op, 1), mode) + && small_int_or_double (XEXP (op, 2), mode) + /* This matches cmp_zero_extract. */ + && ((mode == SImode + && ((GET_CODE (XEXP (op, 2)) == CONST_INT + && INTVAL (XEXP (op, 2)) > 19) + || (GET_CODE (XEXP (op, 2)) == CONST_DOUBLE + && CONST_DOUBLE_LOW (XEXP (op, 2)) > 19))) + /* This matches cmp_zero_extract_sp64. */ + || (mode == DImode + && TARGET_ARCH64 + && ((GET_CODE (XEXP (op, 2)) == CONST_INT + && INTVAL (XEXP (op, 2)) > 51) + || (GET_CODE (XEXP (op, 2)) == CONST_DOUBLE + && CONST_DOUBLE_LOW (XEXP (op, 2)) > 51))))); + else + return register_operand (op, mode); +} + /* We know it can't be done in one insn when we get here, the movsi expander guarantees this. */ |