sh.c (general_movsrc_operand, [...]): Move to ...

	* config/sh/sh.c (general_movsrc_operand,
	general_movdst_operand, arith_reg_operand, arith_reg_dest,
	logical_reg_operand, int_gpr_dest, fp_arith_reg_operand,
	fp_arith_reg_dest, arith_operand, arith_reg_or_0_operand,
	xor_operand, cmp_operand, logical_operand, and_operand,
	fpscr_operand, fpul_operand, symbol_ref_operand,
	commutative_float_operator, noncommutative_float_operator,
	unary_float_operator, binary_float_operator,
	binary_logical_operator, equality_comparison_operator,
	greater_comparison_operator, less_comparison_operator,
	shift_operator, logical_operator, target_reg_operand,
	target_operand, mextr_bit_offset, extend_reg_operand,
	trunc_hi_operand, extend_reg_or_0_operand, minuend_operand,
	general_extend_operand, ua_address_operand,
	cache_address_operand, inqhi_operand, sh_rep_vec, sh_1el_vec,
	sh_const_vec, ua_offset, sh_register_operand, cmpsi_operand,
	shift_count_reg_operand, shift_count_operand,
	unaligned_load_operand): Move to ...
	* config/sh/predicates.md: ... here.
	* config/sh/sh.h (PREDICATE_CODES, SPECIAL_MODE_PREDICATES):
	Remove.

From-SVN: r100523

1 files changed, 0 insertions, 67 deletions

diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 54b15d1..e194759 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -3246,73 +3246,6 @@ extern struct rtx_def *sp_switch;
 #define ADJUST_INSN_LENGTH(X, LENGTH)				\
   (LENGTH) += sh_insn_length_adjustment (X);
 
-/* Define the codes that are matched by predicates in sh.c.  */
-#define PREDICATE_CODES \
-  {"and_operand", {SUBREG, REG, CONST_INT}},				\
-  {"any_arith_reg_dest", {SUBREG, REG}},				\
-  {"any_register_operand", {SUBREG, REG}},				\
-  {"arith_operand", {SUBREG, REG, CONST_INT}},				\
-  {"arith_reg_dest", {SUBREG, REG}},					\
-  {"arith_reg_operand", {SUBREG, REG, SIGN_EXTEND}},			\
-  {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_VECTOR}},	\
-  {"binary_float_operator", {PLUS, MINUS, MULT, DIV}},			\
-  {"binary_logical_operator", {AND, IOR, XOR}},				\
-  {"cache_address_operand", {PLUS, REG}},				\
-  {"cmp_operand", {SUBREG, REG, CONST_INT}},				\
-  {"cmpsi_operand", {SUBREG, REG, CONST_INT}},				\
-  {"commutative_float_operator", {PLUS, MULT}},				\
-  {"equality_comparison_operator", {EQ,NE}},				\
-  {"extend_reg_operand", {SUBREG, REG, TRUNCATE}},			\
-  {"extend_reg_or_0_operand", {SUBREG, REG, TRUNCATE, CONST_INT}},	\
-  {"ext_dest_operand", {SUBREG, REG}},					\
-  {"fp_arith_reg_dest", {SUBREG, REG}},					\
-  {"fp_arith_reg_operand", {SUBREG, REG}},				\
-  {"fpscr_operand", {REG}},						\
-  {"fpul_operand", {REG}},						\
-  {"general_extend_operand", {SUBREG, REG, MEM, TRUNCATE}},		\
-  {"general_movsrc_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE, MEM, CONST }}, \
-  {"general_movdst_operand", {SUBREG, REG, MEM}},			\
-  {"unaligned_load_operand", {MEM}},					\
-  {"greater_comparison_operator", {GT,GE,GTU,GEU}},			\
-  {"inqhi_operand", {TRUNCATE}},					\
-  {"int_gpr_dest", {SUBREG, REG}},					\
-  {"less_comparison_operator", {LT,LE,LTU,LEU}},			\
-  {"logical_operand", {SUBREG, REG, CONST_INT}},			\
-  {"logical_operator", {AND,IOR,XOR}},					\
-  {"logical_reg_operand", {SUBREG, REG}},				\
-  {"mextr_bit_offset", {CONST_INT}},					\
-  {"minuend_operand", {SUBREG, REG, TRUNCATE, CONST_INT}},		\
-  {"noncommutative_float_operator", {MINUS, DIV}},			\
-  {"sh_const_vec", {CONST_VECTOR}},					\
-  {"sh_1el_vec", {CONST_VECTOR}},					\
-  {"sh_register_operand", {REG, SUBREG, CONST_INT}},			\
-  {"sh_rep_vec", {CONST_VECTOR}},					\
-  {"shift_count_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,	\
-			   LABEL_REF, SUBREG, REG, ZERO_EXTEND, SIGN_EXTEND}},\
-  {"shift_count_reg_operand", {SUBREG, REG, ZERO_EXTEND, SIGN_EXTEND}},	\
-  {"shift_operator", {ASHIFT, ASHIFTRT, LSHIFTRT}},			\
-  {"symbol_ref_operand", {SYMBOL_REF}},					\
-  {"target_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, CONST, UNSPEC}},\
-  {"target_reg_operand", {SUBREG, REG}},				\
-  {"trunc_hi_operand", {SUBREG, REG, TRUNCATE}},			\
-  {"ua_address_operand", {SUBREG, REG, PLUS}},				\
-  {"ua_offset", {CONST_INT}},						\
-  {"unary_float_operator", {ABS, NEG, SQRT}},				\
-  {"xor_operand", {SUBREG, REG, CONST_INT}},				\
-
-#define SPECIAL_MODE_PREDICATES \
-  "any_arith_reg_dest", \
-  "any_register_operand", \
-  "int_gpr_dest", \
-  "target_operand", \
-  "target_reg_operand", \
-  "trunc_hi_operand", \
-  /* This line intentionally left blank.  */
-
-#define any_register_operand register_operand
-#define any_arith_reg_dest arith_reg_dest
-#define ext_dest_operand arith_reg_operand
-
 /* Define this macro if it is advisable to hold scalars in registers
    in a wider mode than that declared by the program.  In such cases,
    the value is constrained to be within the bounds of the declared