s390.c: (s390_const_double_ok_for_constraint_p): New function.

2005-05-10  Adrian Straetling  <straetling@de.ibm.com>

	* config/s390/s390.c: (s390_const_double_ok_for_constraint_p): New
	function.
	(legitimate_reload_constant_p): Add check for const double zero.
	* config/s390/s390.md: Add comment for constraint letter 'G'.
	("*movdf_64", "*movdf_31", "movsf"): Add constraint and proper
	attributes for new case.
	* config/s390/s390.h: (CONST_DOUBLE_OK_FOR_CONSTRAINT_P): Define it as
	s390_const_double_ok_for_constraint_p.
	* config/s390/s390-protos.h (s390_const_double_ok_for_constraint_p):
	Add prototype.

From-SVN: r99541

4 files changed, 45 insertions, 13 deletions

diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h
index e1aa827..3d3ca0c 100644
--- a/gcc/config/s390/s390-protos.h
+++ b/gcc/config/s390/s390-protos.h
@@ -33,6 +33,7 @@ extern void s390_conditional_register_usage (void);
 #ifdef RTX_CODE
 extern int s390_extra_constraint_str (rtx, int, const char *);
 extern int s390_const_ok_for_constraint_p (HOST_WIDE_INT, int, const char *);
+extern int s390_const_double_ok_for_constraint_p (rtx, int, const char *);
 extern int s390_single_part (rtx, enum machine_mode, enum machine_mode, int);
 extern unsigned HOST_WIDE_INT s390_extract_part (rtx, enum machine_mode, int);
 extern bool s390_split_ok_p (rtx, rtx, enum machine_mode, int);
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 2c2647e..7cf56cc 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -1680,6 +1680,27 @@ s390_extra_constraint_str (rtx op, int c, const char * str)
 /* Return true if VALUE matches the constraint STR.  */
 
 int
+s390_const_double_ok_for_constraint_p (rtx value,
+				       int c,
+				       const char * str)
+{
+  gcc_assert (c == str[0]);
+
+  switch (str[0])
+    {
+    case 'G':
+      /* The floating point zero constant.  */
+      return (GET_MODE_CLASS (GET_MODE (value)) == MODE_FLOAT
+              && value == CONST0_RTX (GET_MODE (value)));
+      
+    default:
+      return 0;
+    }
+}
+
+/* Return true if VALUE matches the constraint STR.  */
+
+int
 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
 				int c,
 				const char * str)
@@ -2190,6 +2211,11 @@ legitimate_reload_constant_p (rtx op)
       && larl_operand (op, VOIDmode))
     return true;
 
+  /* Accept lzXX operands.  */
+  if (GET_CODE (op) == CONST_DOUBLE
+      && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, 'G', "G"))
+    return true;
+
   /* Everything else cannot be handled without reload.  */
   return false;
 }
diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h
index 06c8bc4..84d0353 100644
--- a/gcc/config/s390/s390.h
+++ b/gcc/config/s390/s390.h
@@ -485,7 +485,8 @@ extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                          \
   s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
 
-#define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR)  1
+#define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR)			\
+  s390_const_double_ok_for_constraint_p ((VALUE), (C), (STR))
 
 #define EXTRA_CONSTRAINT_STR(OP, C, STR)                               	\
   s390_extra_constraint_str ((OP), (C), (STR))
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index fc958f7..d853f8a 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -29,6 +29,7 @@
 ;;    d -- Any register from 0 to 15.
 ;;    f -- Floating point registers.
 ;;    t -- Access registers 36 and 37.
+;;    G -- Const double zero operand
 ;;    I -- An 8-bit constant (0..255).
 ;;    J -- A 12-bit constant (0..4095).
 ;;    K -- A 16-bit constant (-32768..32767).
@@ -1364,10 +1365,11 @@
   "")
 
 (define_insn "*movdf_64"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,m,?Q")
-        (match_operand:DF 1 "general_operand" "f,R,T,f,f,d,m,d,?Q"))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,d,m,?Q")
+        (match_operand:DF 1 "general_operand" "G,f,R,T,f,f,d,m,d,?Q"))]
   "TARGET_64BIT"
   "@
+   lzdr\t%0
    ldr\t%0,%1
    ld\t%0,%1
    ldy\t%0,%1
@@ -1377,14 +1379,15 @@
    lg\t%0,%1
    stg\t%1,%0
    #"
-  [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY,SS")
-   (set_attr "type" "floaddf,floaddf,floaddf,fstoredf,fstoredf,lr,load,store,*")])
+  [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RRE,RXY,RXY,SS")
+   (set_attr "type" "fsimpdf,floaddf,floaddf,floaddf,fstoredf,fstoredf,lr,load,store,*")])
 
 (define_insn "*movdf_31"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,Q,d,o,Q")
-        (match_operand:DF 1 "general_operand" "f,R,T,f,f,Q,d,dKm,d,Q"))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,Q,d,o,Q")
+        (match_operand:DF 1 "general_operand" "G,f,R,T,f,f,Q,d,dKm,d,Q"))]
   "!TARGET_64BIT"
   "@
+   lzdr\t%0
    ldr\t%0,%1
    ld\t%0,%1
    ldy\t%0,%1
@@ -1395,8 +1398,8 @@
    #
    #
    #"
-  [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RS,RS,*,*,SS")
-   (set_attr "type" "floaddf,floaddf,floaddf,fstoredf,fstoredf,lm,stm,*,*,*")])
+  [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RS,*,*,SS")
+   (set_attr "type" "fsimpdf,floaddf,floaddf,floaddf,fstoredf,fstoredf,lm,stm,*,*,*")])
 
 (define_split
   [(set (match_operand:DF 0 "nonimmediate_operand" "")
@@ -1457,10 +1460,11 @@
 ;
 
 (define_insn "movsf"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,d,R,T,?Q")
-        (match_operand:SF 1 "general_operand" "f,R,T,f,f,d,R,T,d,d,?Q"))]
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d,d,d,R,T,?Q")
+        (match_operand:SF 1 "general_operand" "G,f,R,T,f,f,d,R,T,d,d,?Q"))]
   ""
   "@
+   lzer\t%0
    ler\t%0,%1
    le\t%0,%1
    ley\t%0,%1
@@ -1472,8 +1476,8 @@
    st\t%1,%0
    sty\t%1,%0
    #"
-  [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY,SS")
-   (set_attr "type" "floadsf,floadsf,floadsf,fstoresf,fstoresf,
+  [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY,SS")
+   (set_attr "type" "fsimpsf,floadsf,floadsf,floadsf,fstoresf,fstoresf,
                      lr,load,load,store,store,*")])
 
 ;