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| author | Steven Bosscher <stevenb@suse.de> | 2004-06-18 14:27:25 +0000 |
|---|---|---|
| committer | Steven Bosscher <steven@gcc.gnu.org> | 2004-06-18 14:27:25 +0000 |
| commit | 64e1e4c4a7825964b7853402053ad5daf95487b3 (patch) | |
| tree | 7e4e7162e624b2c81086dc88f681974749d7f94a /gcc/config/s390/2064.md | |
| parent | 06d72ee6e3ede175130413390d15726c09678cfb (diff) | |
| download | gcc-64e1e4c4a7825964b7853402053ad5daf95487b3.zip gcc-64e1e4c4a7825964b7853402053ad5daf95487b3.tar.gz gcc-64e1e4c4a7825964b7853402053ad5daf95487b3.tar.bz2 | |
s390.md: Remove the generic pipeline description.
* config/s390/s390.md: Remove the generic pipeline description.
* config/s390/2064.md: Make all insn reservations apply to
the z900, g5 and g6.
* config/s390/s390.c (s390_use_dfa_pipeline_interface): Remove.
(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE):
Define to hook_int_void_1.
(s390_adjust_cost): Cleanup. Don't check address dependency here.
(s390_first_cycle_multipass_dfa_lookahead):
Co-Authored-By: Ulrich Weigand <uweigand@de.ibm.com>
From-SVN: r83350
Diffstat (limited to 'gcc/config/s390/2064.md')
| -rw-r--r-- | gcc/config/s390/2064.md | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/gcc/config/s390/2064.md b/gcc/config/s390/2064.md index 143cd1b..a1a6d13 100644 --- a/gcc/config/s390/2064.md +++ b/gcc/config/s390/2064.md @@ -40,43 +40,45 @@ ;; | ;; wr +;; This scheduler description is also used for the g5 and g6. + (define_automaton "z_ipu") (define_cpu_unit "z_e1" "z_ipu") (define_cpu_unit "z_wr" "z_ipu") (define_insn_reservation "z_la" 1 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "type" "la")) "z_e1,z_wr") (define_insn_reservation "z_larl" 1 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "type" "larl")) "z_e1,z_wr") (define_insn_reservation "z_load" 1 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "type" "load")) "z_e1,z_wr") (define_insn_reservation "z_store" 1 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "type" "store")) "z_e1,z_wr") (define_insn_reservation "z_call" 5 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "type" "jsr")) "z_e1*5,z_wr") (define_insn_reservation "z_o2" 2 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "type" "o2")) "z_e1*2,z_wr") (define_insn_reservation "z_o3" 3 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "type" "o3")) "z_e1*3,z_wr") @@ -86,12 +88,12 @@ ; (define_insn_reservation "z_int" 1 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "atype" "reg")) "z_e1,z_wr") (define_insn_reservation "z_agen" 1 - (and (eq_attr "cpu" "z900") + (and (eq_attr "cpu" "z900,g5,g6") (eq_attr "atype" "agen")) "z_e1,z_wr") |