diff options
| author | Kazuhio Inaoka <kazuhiro.inaoka.ud@renesas.com> | 2011-05-17 08:27:40 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@gcc.gnu.org> | 2011-05-17 08:27:40 +0000 |
| commit | b3db92ac1996449f3c1f29ba17c9c1b73f8b817b (patch) | |
| tree | 19f39188cdbbd5142b186c7f3f545468c41cda7f /gcc/config/rx | |
| parent | f3450bc8d85a76ebfbd7b1fd6bf987465f1abc35 (diff) | |
| download | gcc-b3db92ac1996449f3c1f29ba17c9c1b73f8b817b.zip gcc-b3db92ac1996449f3c1f29ba17c9c1b73f8b817b.tar.gz gcc-b3db92ac1996449f3c1f29ba17c9c1b73f8b817b.tar.bz2 | |
rx.md: Add peepholes to match a register move followed by a comparison of the moved...
* config/rx/rx.md: Add peepholes to match a register move followed
by a comparison of the moved register. Replace these with an
addition of zero that does both actions in one instruction.
Co-Authored-By: Nick Clifton <nickc@redhat.com>
From-SVN: r173819
Diffstat (limited to 'gcc/config/rx')
| -rw-r--r-- | gcc/config/rx/rx.md | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index a9cf50e..fdbf287 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -904,6 +904,39 @@ (set_attr "length" "3,4,5,6,7,6")] ) +;; Peepholes to match: +;; (set (reg A) (reg B)) +;; (set (CC) (compare:CC (reg A/reg B) (const_int 0))) +;; and replace them with the addsi3_flags pattern, using an add +;; of zero to copy the register and set the condition code bits. +(define_peephole2 + [(set (match_operand:SI 0 "register_operand") + (match_operand:SI 1 "register_operand")) + (set (reg:CC CC_REG) + (compare:CC (match_dup 0) + (const_int 0)))] + "" + [(parallel [(set (match_dup 0) + (plus:SI (match_dup 1) (const_int 0))) + (set (reg:CC_ZSC CC_REG) + (compare:CC_ZSC (plus:SI (match_dup 1) (const_int 0)) + (const_int 0)))])] +) + +(define_peephole2 + [(set (match_operand:SI 0 "register_operand") + (match_operand:SI 1 "register_operand")) + (set (reg:CC CC_REG) + (compare:CC (match_dup 1) + (const_int 0)))] + "" + [(parallel [(set (match_dup 0) + (plus:SI (match_dup 1) (const_int 0))) + (set (reg:CC_ZSC CC_REG) + (compare:CC_ZSC (plus:SI (match_dup 1) (const_int 0)) + (const_int 0)))])] +) + (define_expand "adddi3" [(set (match_operand:DI 0 "register_operand") (plus:DI (match_operand:DI 1 "register_operand") |