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author | Segher Boessenkool <segher@kernel.crashing.org> | 2018-09-14 17:24:47 +0200 |
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committer | Segher Boessenkool <segher@gcc.gnu.org> | 2018-09-14 17:24:47 +0200 |
commit | dc928512d21c7205895f03fc1ce18484512cd94a (patch) | |
tree | ef7cb7108490ec1b9d48adf1cd995d991d2dc894 /gcc/config/rs6000 | |
parent | 2dc09f66b3b49d821e4bd68d3c97ff51d5e080d4 (diff) | |
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rs6000: Add another Z to go with Y (PR87224)
This is another case where we ICE because Y does not allow reg+reg, we
need Z for that.
PR target/87224
* config/rs6000/rs6000.md (*mov<mode>_hardfloat64): Add Z to the Y
alternatives.
From-SVN: r264316
Diffstat (limited to 'gcc/config/rs6000')
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index e40dc42..b0889df 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7455,13 +7455,13 @@ [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m, d, d, <f64_p9>, wY, <f64_av>, Z, <f64_vsx>, <f64_vsx>, !r, - Y, r, !r, *c*l, !r, + YZ, r, !r, *c*l, !r, *h, r, wg, r, <f64_dm>") (match_operand:FMOVE64 1 "input_operand" "d, m, d, wY, <f64_p9>, Z, <f64_av>, <f64_vsx>, <zero_fp>, <zero_fp>, - r, Y, r, r, h, + r, YZ, r, r, h, 0, wg, r, <f64_dm>, r"))] "TARGET_POWERPC64 && TARGET_HARD_FLOAT |