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authorDavid Edelsohn <edelsohn@mhpcc.edu>1998-10-05 22:03:25 +0000
committerDavid Edelsohn <dje@gcc.gnu.org>1998-10-05 18:03:25 -0400
commitcac8ce95a1e4c7b10f5847d35b3650e6fba8d38c (patch)
tree73ad9f3c2b5d7897f532583b4fa7c64ee081961a /gcc/config/rs6000
parentd64db93fbcb807f996f5b7204603c18893a7b0b9 (diff)
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unroll.c (loop_iteration_var, [...]): No longer static.
* unroll.c (loop_iteration_var, loop_initial_value, loop_increment loop_final_value, loop_comparison_code): No longer static. (unroll_loop): Delete loop_start_value update. * loop.h (loop_iteration_var, loop_initial_value, loop_increment, loop_final_value, loop_comparison_code): Extern. (loop_start_value): Delete extern. * loop.c (loop_can_insert_bct, loop_increment, loop_start_value, loop_comparison_value, loop_comparison_code): Delete. (loop_optimize): Remove initialization for deleted variables. (strength_reduce): Delete analyze_loop_iterations call. Only call insert_bct if flag_branch_count_on_reg set. (analyze_loop_iterations): Delete. (insert_bct): Remove iteration count calculation. Move checks for viable BCT optimization to here. Obtain iteration count from loop_iterations and correct for unrolling. Check for enough iteration to be beneficial. Comment out runtime iteration count case. (insert_bct): Print iteration count in dump file. Remove loop_var_mode and use word_mode directly. * rs6000.h (processor_type): Add PROCESSOR_PPC604e. * rs6000.c (rs6000_override_options): Use it. (optimization_options): Enable use of flag_branch_on_count_reg. * rs6000.md (define_function_unit): Describe 604e. From-SVN: r22852
Diffstat (limited to 'gcc/config/rs6000')
-rw-r--r--gcc/config/rs6000/rs6000.c4
-rw-r--r--gcc/config/rs6000/rs6000.h3
-rw-r--r--gcc/config/rs6000/rs6000.md35
3 files changed, 23 insertions, 19 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f4f47ed..b1b36fe 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -228,7 +228,7 @@ rs6000_override_options (default_cpu)
{"604", PROCESSOR_PPC604,
MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
- {"604e", PROCESSOR_PPC604,
+ {"604e", PROCESSOR_PPC604e,
MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
{"620", PROCESSOR_PPC620,
@@ -353,13 +353,11 @@ optimization_options (level, size)
int level;
int size ATTRIBUTE_UNUSED;
{
-#if 0
#ifdef HAIFA
/* When optimizing, enable use of BCT instruction. */
if (level >= 1)
flag_branch_on_count_reg = 1;
#endif
-#endif
}
/* Do anything needed at the start of the asm file. */
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 1ceef95..bbdcebb 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -389,7 +389,7 @@ extern int target_flags;
#define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING)
-/* Processor type. */
+/* Processor type. Order must match cpu attribute in MD file. */
enum processor_type
{PROCESSOR_RIOS1,
PROCESSOR_RIOS2,
@@ -398,6 +398,7 @@ enum processor_type
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
+ PROCESSOR_PPC604e,
PROCESSOR_PPC620};
extern enum processor_type rs6000_cpu;
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 2306407..7b7f989 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -40,7 +40,7 @@
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
-(define_attr "cpu" "rios1,rios2,mpccore,ppc403,ppc601,ppc603,ppc604,ppc620"
+(define_attr "cpu" "rios1,rios2,mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620"
(const (symbol_ref "rs6000_cpu_attr")))
; (define_function_unit NAME MULTIPLICITY SIMULTANEITY
@@ -50,12 +50,12 @@
; (POWER and 601 use Integer Unit)
(define_function_unit "lsu" 1 0
(and (eq_attr "type" "load")
- (eq_attr "cpu" "mpccore,ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "mpccore,ppc603,ppc604,ppc604e,ppc620"))
2 1)
(define_function_unit "lsu" 1 0
(and (eq_attr "type" "store,fpstore")
- (eq_attr "cpu" "mpccore,ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "mpccore,ppc603,ppc604,ppc604e,ppc620"))
1 1)
(define_function_unit "lsu" 1 0
@@ -65,7 +65,7 @@
(define_function_unit "lsu" 1 0
(and (eq_attr "type" "fpload")
- (eq_attr "cpu" "ppc604,ppc620"))
+ (eq_attr "cpu" "ppc604,ppc604e,ppc620"))
3 1)
(define_function_unit "iu" 1 0
@@ -181,12 +181,12 @@
(eq_attr "cpu" "mpccore"))
6 6)
-; PPC604 has two units that perform integer operations
+; PPC604{,e} has two units that perform integer operations
; and one unit for divide/multiply operations (and move
; from/to spr).
(define_function_unit "iu2" 2 0
(and (eq_attr "type" "integer")
- (eq_attr "cpu" "ppc604,ppc620"))
+ (eq_attr "cpu" "ppc604,ppc604e,ppc620"))
1 1)
(define_function_unit "imuldiv" 1 0
@@ -195,8 +195,13 @@
4 2)
(define_function_unit "imuldiv" 1 0
+ (and (eq_attr "type" "imul")
+ (eq_attr "cpu" "ppc604e"))
+ 2 1)
+
+(define_function_unit "imuldiv" 1 0
(and (eq_attr "type" "idiv")
- (eq_attr "cpu" "ppc604,ppc620"))
+ (eq_attr "cpu" "ppc604,ppc604e,ppc620"))
20 19)
; compare is done on integer unit, but feeds insns which
@@ -213,7 +218,7 @@
(define_function_unit "iu" 1 0
(and (eq_attr "type" "compare,delayed_compare")
- (eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620"))
3 1)
(define_function_unit "iu2" 2 0
@@ -223,7 +228,7 @@
(define_function_unit "iu2" 2 0
(and (eq_attr "type" "compare,delayed_compare")
- (eq_attr "cpu" "ppc604,ppc620"))
+ (eq_attr "cpu" "ppc604,ppc604e,ppc620"))
1 1)
; fp compare uses fp unit
@@ -250,7 +255,7 @@
; fp compare uses fp unit
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "fpcompare")
- (eq_attr "cpu" "ppc601,ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "ppc601,ppc603,ppc604,ppc604e,ppc620"))
5 1)
(define_function_unit "fpu" 1 0
@@ -265,7 +270,7 @@
(define_function_unit "bpu" 1 0
(and (eq_attr "type" "mtjmpr")
- (eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "mpccore,ppc403,ppc601,ppc603,ppc604,ppc604e,ppc620"))
4 1)
; all jumps/branches are executing on the bpu, in 1 cycle, for all machines.
@@ -295,7 +300,7 @@
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "fp")
- (eq_attr "cpu" "ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "ppc603,ppc604,ppc604e,ppc620"))
3 1)
(define_function_unit "fpu" 1 0
@@ -316,7 +321,7 @@
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "dmul")
- (eq_attr "cpu" "ppc604,ppc620"))
+ (eq_attr "cpu" "ppc604,ppc604e,ppc620"))
3 1)
(define_function_unit "fpu" 1 0
@@ -336,7 +341,7 @@
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "sdiv")
- (eq_attr "cpu" "ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "ppc603,ppc604,ppc604e,ppc620"))
18 18)
(define_function_unit "fpu" 1 0
@@ -346,7 +351,7 @@
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "ddiv")
- (eq_attr "cpu" "ppc601,ppc604,ppc620"))
+ (eq_attr "cpu" "ppc601,ppc604,ppc604e,ppc620"))
31 31)
(define_function_unit "fpu" 1 0