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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2015-11-09 16:56:22 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2015-11-09 16:56:22 +0000 |
| commit | d1f0d3769edfb2217f19f0937f30423e6298f744 (patch) | |
| tree | 67a2fb9cb34958ba57d1f290473f158c57978d91 /gcc/config/rs6000/rs6000-cpus.def | |
| parent | ee78df47b1543f412622ae05601f7ee6f6862820 (diff) | |
| download | gcc-d1f0d3769edfb2217f19f0937f30423e6298f744.zip gcc-d1f0d3769edfb2217f19f0937f30423e6298f744.tar.gz gcc-d1f0d3769edfb2217f19f0937f30423e6298f744.tar.bz2 | |
rs6000.opt (-mpower9-fusion): Add new switches for ISA 3.0 (power9).
2015-11-09 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000.opt (-mpower9-fusion): Add new switches for
ISA 3.0 (power9).
(-mpower9-vector): Likewise.
(-mpower9-dform): Likewise.
(-mpower9-minmax): Likewise.
(-mtoc-fusion): Likewise.
(-mmodulo): Likewise.
(-mfloat128-hardware): Likewise.
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add option
mask for ISA 3.0 (power9).
(POWERPC_MASKS): Add new ISA 3.0 switches.
(power9 cpu): Add power9 cpu.
* config/rs6000/rs6000.h (ASM_CPU_POWER9_SPEC): Add support for
power9.
(ASM_CPU_SPEC): Likewise.
(EXTRA_SPECS): Likewise.
* config/rs6000/rs6000-opts.h (enum processor_type): Add
PROCESSOR_POWER9.
* config/rs6000/rs6000.c (power9_cost): Initial cost setup for
power9.
(rs6000_debug_reg_global): Add support for power9 fusion.
(rs6000_setup_reg_addr_masks): Cache mode size.
(rs6000_option_override_internal): Until real power9 tuning is
added, use -mtune=power8 for -mcpu=power9.
(rs6000_setup_reg_addr_masks): Do not allow pre-increment,
pre-decrement, or pre-modify on SFmode/DFmode if we allow the use
of Altivec registers.
(rs6000_option_override_internal): Add support for ISA 3.0
switches.
(rs6000_loop_align): Add support for power9 cpu.
(rs6000_file_start): Likewise.
(rs6000_adjust_cost): Likewise.
(rs6000_issue_rate): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise.
(rs6000_register_move_cost): Likewise.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.md (cpu attribute): Add power9.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
_ARCH_PWR9 if power9 support is available.
* config/rs6000/aix61.h (ASM_CPU_SPEC): Add power9.
* config/rs6000/aix53.h (ASM_CPU_SPEC): Likewise.
* configure.ac: Determine if the assembler supports the ISA 3.0
instructions.
* config.in (HAVE_AS_POWER9): Likewise.
* configure: Regenerate.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document ISA 3.0
switches.
From-SVN: r230031
Diffstat (limited to 'gcc/config/rs6000/rs6000-cpus.def')
| -rw-r--r-- | gcc/config/rs6000/rs6000-cpus.def | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index c63506b..fc2b0f1 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -60,6 +60,15 @@ | OPTION_MASK_QUAD_MEMORY_ATOMIC \ | OPTION_MASK_UPPER_REGS_SF) +/* Add ISEL back into ISA 3.0, since it is supposed to be a win. Do not add + P9_DFORM or P9_MINMAX until they are fully debugged. */ +#define ISA_3_0_MASKS_SERVER (ISA_2_7_MASKS_SERVER \ + | OPTION_MASK_FLOAT128_HW \ + | OPTION_MASK_ISEL \ + | OPTION_MASK_MODULO \ + | OPTION_MASK_P9_FUSION \ + | OPTION_MASK_P9_VECTOR) + #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC) /* Deal with ports that do not have -mstrict-align. */ @@ -87,10 +96,15 @@ | OPTION_MASK_ISEL \ | OPTION_MASK_MFCRF \ | OPTION_MASK_MFPGPR \ + | OPTION_MASK_MODULO \ | OPTION_MASK_MULHW \ | OPTION_MASK_NO_UPDATE \ | OPTION_MASK_P8_FUSION \ | OPTION_MASK_P8_VECTOR \ + | OPTION_MASK_P9_DFORM \ + | OPTION_MASK_P9_FUSION \ + | OPTION_MASK_P9_MINMAX \ + | OPTION_MASK_P9_VECTOR \ | OPTION_MASK_POPCNTB \ | OPTION_MASK_POPCNTD \ | OPTION_MASK_POWERPC64 \ @@ -101,6 +115,7 @@ | OPTION_MASK_RECIP_PRECISION \ | OPTION_MASK_SOFT_FLOAT \ | OPTION_MASK_STRICT_ALIGN_OPTIONAL \ + | OPTION_MASK_TOC_FUSION \ | OPTION_MASK_UPPER_REGS_DF \ | OPTION_MASK_UPPER_REGS_SF \ | OPTION_MASK_VSX \ @@ -195,6 +210,7 @@ RS6000_CPU ("power7", PROCESSOR_POWER7, /* Don't add MASK_ISEL by default */ | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD | MASK_VSX | MASK_RECIP_PRECISION | OPTION_MASK_UPPER_REGS_DF) RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER) +RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER) RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0) RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64) RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER) |