rs6000.h (processor_type): Add PPC440.

	* config/rs6000/rs6000.h (processor_type): Add PPC440.
	* config/rs6000/rs6000.c (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE,
	TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD,
	TARGET_SCHED_VARIABLE_ISSUE): Define.
	(rs6000_use_dfa_pipeline_interface): New function.
	(rs6000_multipass_dfa_lookahead): New Function.
	(rs6000_variable_issue): New function.
	(rs6000_adjust_cost): Add CMP and DELAYED_CR types.
	(rs6000_issue_rate): Add PPC440.
	* config/rs6000/rs6000.md (unspec list): Correct typo.
	(attr "type"): Add load_ext, load_ext_u, load_ext_ux, load_u,
	store_ux, store_u, fpload_ux, fpload_u, fpstore_ux, fpstore_u,
	cmp, delayed_cr, mfcr, mtcr.
	(automata_option): Set "ndfa".
	(extendMMNN2): Update attributes.
	(movcc_internal1): Discourage move to non-cr0.  Update
	attributes.
	(movMM_update): Update attributes.
	(cmpMM_internal): Update attributes.
	(sCC CR materialization): Update attributes.
	(branch patterns): Do not discourage non-cr0.
	(cr logical patterns): Prefer destructive register allocation.
	Update attributes.
	(movesi_from_cr): Update attribute.
	(mtcrf_operation): Update attribute.
	(mtcrfsi): Update attribute.
	* config/rs6000/40x.md: New file.
	* config/rs6000/603.md: New file.
	* config/rs6000/6xx.md: New file.
	* config/rs6000/7450.md: New file.
	* config/rs6000/7xx.md: New file.
	* config/rs6000/mpc.md: New file.
	* config/rs6000/power4.md: New file.
	* config/rs6000/rios1.md: New file.
	* config/rs6000/rios2.md: New file.
	* config/rs6000/rs64.md: New file.
	[Some DFA descriptions based on work by Michael Hayes]

From-SVN: r62943

1 files changed, 79 insertions, 0 deletions

diff --git a/gcc/config/rs6000/mpc.md b/gcc/config/rs6000/mpc.md
new file mode 100644
index 0000000..b944e8e
--- /dev/null
+++ b/gcc/config/rs6000/mpc.md
@@ -0,0 +1,79 @@
+(define_automaton "mpc,mpcfp")
+(define_cpu_unit "iu_mpc,mciu_mpc" "mpc")
+(define_cpu_unit "fpu_mpc" "mpcfp")
+(define_cpu_unit "lsu_mpc,bpu_mpc" "mpc")
+
+;; MPCCORE 32-bit SCIU, MCIU, LSU, FPU, BPU
+;; 505/801/821/823
+
+(define_insn_reservation "mpccore-load" 2
+  (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u")
+       (eq_attr "cpu" "mpccore"))
+  "lsu_mpc")
+
+(define_insn_reservation "mpccore-store" 1
+  (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u")
+       (eq_attr "cpu" "mpccore"))
+  "lsu_mpc")
+
+(define_insn_reservation "mpccore-fpload" 2
+  (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
+       (eq_attr "cpu" "mpccore"))
+  "lsu_mpc")
+
+(define_insn_reservation "mpccore-integer" 1
+  (and (eq_attr "type" "integer")
+       (eq_attr "cpu" "mpccore"))
+  "iu_mpc")
+
+(define_insn_reservation "mpccore-imul" 2
+  (and (eq_attr "type" "imul,imul2,imul3")
+       (eq_attr "cpu" "mpccore"))
+  "mciu_mpc")
+
+; Divide latency varies greatly from 2-11, use 6 as average
+(define_insn_reservation "mpccore-idiv" 6
+  (and (eq_attr "type" "idiv")
+       (eq_attr "cpu" "mpccore"))
+  "mciu_mpc*6")
+
+(define_insn_reservation "mpccore-compare" 3
+  (and (eq_attr "type" "cmp,compare,delayed_compare")
+       (eq_attr "cpu" "mpccore"))
+  "iu_mpc,nothing,bpu_mpc")
+
+(define_insn_reservation "mpccore-fpcompare" 2
+  (and (eq_attr "type" "fpcompare")
+       (eq_attr "cpu" "mpccore"))
+  "fpu_mpc,bpu_mpc")
+
+(define_insn_reservation "mpccore-fp" 4
+  (and (eq_attr "type" "fp")
+       (eq_attr "cpu" "mpccore"))
+  "fpu_mpc*2")
+
+(define_insn_reservation "mpccore-dmul" 5
+  (and (eq_attr "type" "dmul")
+       (eq_attr "cpu" "mpccore"))
+  "fpu_mpc*5")
+
+(define_insn_reservation "mpccore-sdiv" 10
+  (and (eq_attr "type" "sdiv")
+       (eq_attr "cpu" "mpccore"))
+  "fpu_mpc*10")
+
+(define_insn_reservation "mpccore-ddiv" 17
+  (and (eq_attr "type" "ddiv")
+       (eq_attr "cpu" "mpccore"))
+  "fpu_mpc*17")
+
+(define_insn_reservation "mpccore-mtjmpr" 4
+  (and (eq_attr "type" "mtjmpr")
+       (eq_attr "cpu" "mpccore"))
+  "bpu_mpc")
+
+(define_insn_reservation "mpccore-jmpreg" 1
+  (and (eq_attr "type" "jmpreg,branch,cr_logical,delayed_cr,mfcr,mtcr")
+       (eq_attr "cpu" "mpccore"))
+  "bpu_mpc")
+