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author | Jakub Jelinek <jakub@redhat.com> | 2022-01-03 10:42:10 +0100 |
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committer | Jakub Jelinek <jakub@redhat.com> | 2022-01-03 10:42:10 +0100 |
commit | 7adcbafe45f8001b698967defe682687b52c0007 (patch) | |
tree | a927c8a8ba5f074c814e92a1fe7b01c1f50199ee /gcc/config/riscv | |
parent | 5d5db19630ff3b56c91a1c15d12c8167627f9ebe (diff) | |
download | gcc-7adcbafe45f8001b698967defe682687b52c0007.zip gcc-7adcbafe45f8001b698967defe682687b52c0007.tar.gz gcc-7adcbafe45f8001b698967defe682687b52c0007.tar.bz2 |
Update copyright years.
Diffstat (limited to 'gcc/config/riscv')
28 files changed, 28 insertions, 28 deletions
diff --git a/gcc/config/riscv/arch-canonicalize b/gcc/config/riscv/arch-canonicalize index 90dbd19..49a6204 100755 --- a/gcc/config/riscv/arch-canonicalize +++ b/gcc/config/riscv/arch-canonicalize @@ -1,7 +1,7 @@ #!/usr/bin/env python # Tool for canonical RISC-V architecture string. -# Copyright (C) 2011-2021 Free Software Foundation, Inc. +# Copyright (C) 2011-2022 Free Software Foundation, Inc. # Contributed by Andrew Waterman (andrew@sifive.com). # # This file is part of GCC. diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index 59779b4..0ab9ffe 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -1,5 +1,5 @@ ;; Machine description for RISC-V Bit Manipulation operations. -;; Copyright (C) 2021 Free Software Foundation, Inc. +;; Copyright (C) 2021-2022 Free Software Foundation, Inc. ;; This file is part of GCC. diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md index c87d5b7..bafa418 100644 --- a/gcc/config/riscv/constraints.md +++ b/gcc/config/riscv/constraints.md @@ -1,5 +1,5 @@ ;; Constraint definitions for RISC-V target. -;; Copyright (C) 2011-2021 Free Software Foundation, Inc. +;; Copyright (C) 2011-2022 Free Software Foundation, Inc. ;; Contributed by Andrew Waterman (andrew@sifive.com). ;; Based on MIPS target for GNU compiler. ;; diff --git a/gcc/config/riscv/elf.h b/gcc/config/riscv/elf.h index 7e65e49..f0e865d 100644 --- a/gcc/config/riscv/elf.h +++ b/gcc/config/riscv/elf.h @@ -1,5 +1,5 @@ /* Target macros for riscv*-elf targets. - Copyright (C) 1994-2021 Free Software Foundation, Inc. + Copyright (C) 1994-2022 Free Software Foundation, Inc. This file is part of GCC. diff --git a/gcc/config/riscv/freebsd.h b/gcc/config/riscv/freebsd.h index 6018e7b..5e5cbe0 100644 --- a/gcc/config/riscv/freebsd.h +++ b/gcc/config/riscv/freebsd.h @@ -1,5 +1,5 @@ /* Definitions for RISC-V FreeBSD systems with ELF format. - Copyright (C) 2018-2021 Free Software Foundation, Inc. + Copyright (C) 2018-2022 Free Software Foundation, Inc. This file is part of GCC. diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md index 10d8824..1a209dc 100644 --- a/gcc/config/riscv/generic.md +++ b/gcc/config/riscv/generic.md @@ -1,5 +1,5 @@ ;; Generic DFA-based pipeline description for RISC-V targets. -;; Copyright (C) 2011-2021 Free Software Foundation, Inc. +;; Copyright (C) 2011-2022 Free Software Foundation, Inc. ;; Contributed by Andrew Waterman (andrew@sifive.com). ;; Based on MIPS target for GNU compiler. diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h index fce5b89..3880372 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h @@ -1,5 +1,5 @@ /* Definitions for RISC-V GNU/Linux systems with ELF format. - Copyright (C) 1998-2021 Free Software Foundation, Inc. + Copyright (C) 1998-2022 Free Software Foundation, Inc. This file is part of GCC. diff --git a/gcc/config/riscv/multilib-generator b/gcc/config/riscv/multilib-generator index 358bda9..1ea2fb2 100755 --- a/gcc/config/riscv/multilib-generator +++ b/gcc/config/riscv/multilib-generator @@ -1,7 +1,7 @@ #!/usr/bin/env python # RISC-V multilib list generator. -# Copyright (C) 2011-2021 Free Software Foundation, Inc. +# Copyright (C) 2011-2022 Free Software Foundation, Inc. # Contributed by Andrew Waterman (andrew@sifive.com). # # This file is part of GCC. diff --git a/gcc/config/riscv/peephole.md b/gcc/config/riscv/peephole.md index aacd7fb8..d9477f4 100644 --- a/gcc/config/riscv/peephole.md +++ b/gcc/config/riscv/peephole.md @@ -1,5 +1,5 @@ ;; Peephole optimizations for RISC-V for GNU compiler. -;; Copyright (C) 2011-2021 Free Software Foundation, Inc. +;; Copyright (C) 2011-2022 Free Software Foundation, Inc. ;; Contributed by Andrew Waterman (andrew@sifive.com). ;; This file is part of GCC. diff --git a/gcc/config/riscv/pic.md b/gcc/config/riscv/pic.md index fc190c8..b256c58 100644 --- a/gcc/config/riscv/pic.md +++ b/gcc/config/riscv/pic.md @@ -1,5 +1,5 @@ ;; PIC codegen for RISC-V for GNU compiler. -;; Copyright (C) 2011-2021 Free Software Foundation, Inc. +;; Copyright (C) 2011-2022 Free Software Foundation, Inc. ;; Contributed by Andrew Waterman (andrew@sifive.com). ;; This file is part of GCC. diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md index 3da6fd4..97cdbdf 100644 --- a/gcc/config/riscv/predicates.md +++ b/gcc/config/riscv/predicates.md @@ -1,5 +1,5 @@ ;; Predicate description for RISC-V target. -;; Copyright (C) 2011-2021 Free Software Foundation, Inc. +;; Copyright (C) 2011-2022 Free Software Foundation, Inc. ;; Contributed by Andrew Waterman (andrew@sifive.com). ;; Based on MIPS target for GNU compiler. ;; diff --git a/gcc/config/riscv/riscv-builtins.c b/gcc/config/riscv/riscv-builtins.c index 97b1480..0658f8d 100644 --- a/gcc/config/riscv/riscv-builtins.c +++ b/gcc/config/riscv/riscv-builtins.c @@ -1,5 +1,5 @@ /* Subroutines used for expanding RISC-V builtins. - Copyright (C) 2011-2021 Free Software Foundation, Inc. + Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). This file is part of GCC. diff --git a/gcc/config/riscv/riscv-c.c b/gcc/config/riscv/riscv-c.c index efd4a61..211472f 100644 --- a/gcc/config/riscv/riscv-c.c +++ b/gcc/config/riscv/riscv-c.c @@ -1,5 +1,5 @@ /* RISC-V-specific code for C family languages. - Copyright (C) 2011-2021 Free Software Foundation, Inc. + Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). This file is part of GCC. diff --git a/gcc/config/riscv/riscv-cores.def b/gcc/config/riscv/riscv-cores.def index bf5aaba..ecb5e21 100644 --- a/gcc/config/riscv/riscv-cores.def +++ b/gcc/config/riscv/riscv-cores.def @@ -1,5 +1,5 @@ /* List of supported core and tune info for RISC-V. - Copyright (C) 2020-2021 Free Software Foundation, Inc. + Copyright (C) 2020-2022 Free Software Foundation, Inc. This file is part of GCC. diff --git a/gcc/config/riscv/riscv-d.c b/gcc/config/riscv/riscv-d.c index 8883cec..729de96 100644 --- a/gcc/config/riscv/riscv-d.c +++ b/gcc/config/riscv/riscv-d.c @@ -1,5 +1,5 @@ /* Subroutines for the D front end on the RISC-V architecture. - Copyright (C) 2017-2021 Free Software Foundation, Inc. + Copyright (C) 2017-2022 Free Software Foundation, Inc. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def index b19b731..2214c49 100644 --- a/gcc/config/riscv/riscv-ftypes.def +++ b/gcc/config/riscv/riscv-ftypes.def @@ -1,5 +1,5 @@ /* Definitions of prototypes for RISC-V built-in functions. -*- C -*- - Copyright (C) 2011-2021 Free Software Foundation, Inc. + Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). Based on MIPS target for GNU compiler. diff --git a/gcc/config/riscv/riscv-modes.def b/gcc/config/riscv/riscv-modes.def index 0c87e06..6532284 100644 --- a/gcc/config/riscv/riscv-modes.def +++ b/gcc/config/riscv/riscv-modes.def @@ -1,5 +1,5 @@ /* Extra machine modes for RISC-V target. - Copyright (C) 2011-2021 Free Software Foundation, Inc. + Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). Based on MIPS target for GNU compiler. diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h index f65ff67..6a0354d 100644 --- a/gcc/config/riscv/riscv-opts.h +++ b/gcc/config/riscv/riscv-opts.h @@ -1,5 +1,5 @@ /* Definition of RISC-V target for GNU compiler. - Copyright (C) 2016-2021 Free Software Foundation, Inc. + Copyright (C) 2016-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). This file is part of GCC. diff --git a/gcc/config/riscv/riscv-passes.def b/gcc/config/riscv/riscv-passes.def index 9dc05ac..23ef8ac 100644 --- a/gcc/config/riscv/riscv-passes.def +++ b/gcc/config/riscv/riscv-passes.def @@ -1,5 +1,5 @@ /* Declaration of target-specific passes for RISC-V. - Copyright (C) 2019-2021 Free Software Foundation, Inc. + Copyright (C) 2019-2022 Free Software Foundation, Inc. This file is part of GCC. diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index 43d7224..6bca84c 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -1,5 +1,5 @@ /* Definition of RISC-V target for GNU compiler. - Copyright (C) 2011-2021 Free Software Foundation, Inc. + Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). Based on MIPS target for GNU compiler. diff --git a/gcc/config/riscv/riscv-shorten-memrefs.c b/gcc/config/riscv/riscv-shorten-memrefs.c index 3f34065..ae2068f 100644 --- a/gcc/config/riscv/riscv-shorten-memrefs.c +++ b/gcc/config/riscv/riscv-shorten-memrefs.c @@ -1,5 +1,5 @@ /* Shorten memrefs pass for RISC-V. - Copyright (C) 2018-2021 Free Software Foundation, Inc. + Copyright (C) 2018-2022 Free Software Foundation, Inc. This file is part of GCC. diff --git a/gcc/config/riscv/riscv-subset.h b/gcc/config/riscv/riscv-subset.h index 793655a..4f3556a 100644 --- a/gcc/config/riscv/riscv-subset.h +++ b/gcc/config/riscv/riscv-subset.h @@ -1,5 +1,5 @@ /* Definition of data structure of RISC-V subset for GNU compiler. - Copyright (C) 2011-2021 Free Software Foundation, Inc. + Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). Based on MIPS target for GNU compiler. diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index a545dbf..d9dadaa 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation for RISC-V. - Copyright (C) 2011-2021 Free Software Foundation, Inc. + Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). Based on MIPS target for GNU compiler. diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 6428712..7c0473c 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -1,5 +1,5 @@ /* Definition of RISC-V target for GNU compiler. - Copyright (C) 2011-2021 Free Software Foundation, Inc. + Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by Andrew Waterman (andrew@sifive.com). Based on MIPS target for GNU compiler. diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 225e5b2..0492392 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -1,5 +1,5 @@ ;; Machine description for RISC-V for GNU compiler. -;; Copyright (C) 2011-2021 Free Software Foundation, Inc. +;; Copyright (C) 2011-2022 Free Software Foundation, Inc. ;; Contributed by Andrew Waterman (andrew@sifive.com). ;; Based on MIPS target for GNU compiler. diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt index 6170009..486121b 100644 --- a/gcc/config/riscv/riscv.opt +++ b/gcc/config/riscv/riscv.opt @@ -1,6 +1,6 @@ ; Options for the RISC-V port of the compiler ; -; Copyright (C) 2011-2021 Free Software Foundation, Inc. +; Copyright (C) 2011-2022 Free Software Foundation, Inc. ; ; This file is part of GCC. ; diff --git a/gcc/config/riscv/rtems.h b/gcc/config/riscv/rtems.h index 5b3719c..14e5e59 100644 --- a/gcc/config/riscv/rtems.h +++ b/gcc/config/riscv/rtems.h @@ -1,5 +1,5 @@ /* Definitions for RISC-V RTEMS systems with ELF format. - Copyright (C) 2017-2021 Free Software Foundation, Inc. + Copyright (C) 2017-2022 Free Software Foundation, Inc. This file is part of GCC. diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 747a799..86b41e6b 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -1,5 +1,5 @@ ;; Machine description for RISC-V atomic operations. -;; Copyright (C) 2011-2021 Free Software Foundation, Inc. +;; Copyright (C) 2011-2022 Free Software Foundation, Inc. ;; Contributed by Andrew Waterman (andrew@sifive.com). ;; Based on MIPS target for GNU compiler. |