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| author | Patrick O'Neill <patrick@rivosinc.com> | 2023-04-05 09:48:06 -0700 |
|---|---|---|
| committer | Patrick O'Neill <patrick@rivosinc.com> | 2023-05-02 13:08:04 -0700 |
| commit | 08c5d1804a027f1e4bee4ed5fda25522d9ac8806 (patch) | |
| tree | 5bbfe4fba5606f2376c84d911575045657eeea44 /gcc/config/riscv/sync.md | |
| parent | 6a2383f47ae70c31f91775142b9fb03f697741c2 (diff) | |
| download | gcc-08c5d1804a027f1e4bee4ed5fda25522d9ac8806.zip gcc-08c5d1804a027f1e4bee4ed5fda25522d9ac8806.tar.gz gcc-08c5d1804a027f1e4bee4ed5fda25522d9ac8806.tar.bz2 | |
RISC-V: Eliminate AMO op fences
Atomic operations with the appropriate bits set already enfore release
semantics. Remove unnecessary release fences from atomic ops.
This change brings AMO ops in line with table A.6 of the ISA manual.
2023-04-27 Patrick O'Neill <patrick@rivosinc.com>
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_memmodel_needs_amo_release): Change function name.
(riscv_print_operand): Remove unneeded %F case.
* config/riscv/sync.md: Remove unneeded fences.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
Diffstat (limited to 'gcc/config/riscv/sync.md')
| -rw-r--r-- | gcc/config/riscv/sync.md | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 1acb78a..9a3b57b 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -91,9 +91,9 @@ (match_operand:SI 2 "const_int_operand")] ;; model UNSPEC_SYNC_OLD_OP))] "TARGET_ATOMIC" - "%F2amo<insn>.<amo>%A2 zero,%z1,%0" + "amo<insn>.<amo>%A2\tzero,%z1,%0" [(set_attr "type" "atomic") - (set (attr "length") (const_int 8))]) + (set (attr "length") (const_int 4))]) (define_insn "atomic_fetch_<atomic_optab><mode>" [(set (match_operand:GPR 0 "register_operand" "=&r") @@ -105,9 +105,9 @@ (match_operand:SI 3 "const_int_operand")] ;; model UNSPEC_SYNC_OLD_OP))] "TARGET_ATOMIC" - "%F3amo<insn>.<amo>%A3 %0,%z2,%1" + "amo<insn>.<amo>%A3\t%0,%z2,%1" [(set_attr "type" "atomic") - (set (attr "length") (const_int 8))]) + (set (attr "length") (const_int 4))]) (define_insn "subword_atomic_fetch_strong_<atomic_optab>" [(set (match_operand:SI 0 "register_operand" "=&r") ;; old value at mem @@ -247,9 +247,9 @@ (set (match_dup 1) (match_operand:GPR 2 "register_operand" "0"))] "TARGET_ATOMIC" - "%F3amoswap.<amo>%A3 %0,%z2,%1" + "amoswap.<amo>%A3\t%0,%z2,%1" [(set_attr "type" "atomic") - (set (attr "length") (const_int 8))]) + (set (attr "length") (const_int 4))]) (define_expand "atomic_exchange<mode>" [(match_operand:SHORT 0 "register_operand") ;; old value at mem |