RISC-V: Add RVV misc intrinsic support

Co-authored-by: kito-cheng <kito.cheng@sifive.com>

gcc/ChangeLog:

	* config/riscv/predicates.md (vector_any_register_operand): New predicate.
	* config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
	(riscv_register_pragmas): Add builtin function check call.
	* config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
	(check_builtin_call): New function.
	* config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
	(class vreinterpret): Ditto.
	(class vlmul_ext): Ditto.
	(class vlmul_trunc): Ditto.
	(class vset): Ditto.
	(class vget): Ditto.
	(BASE): Ditto.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
	(vluxei16): Ditto.
	(vluxei32): Ditto.
	(vluxei64): Ditto.
	(vloxei8): Ditto.
	(vloxei16): Ditto.
	(vloxei32): Ditto.
	(vloxei64): Ditto.
	(vsuxei8): Ditto.
	(vsuxei16): Ditto.
	(vsuxei32): Ditto.
	(vsuxei64): Ditto.
	(vsoxei8): Ditto.
	(vsoxei16): Ditto.
	(vsoxei32): Ditto.
	(vsoxei64): Ditto.
	(vundefined): Add new intrinsic.
	(vreinterpret): Ditto.
	(vlmul_ext): Ditto.
	(vlmul_trunc): Ditto.
	(vset): Ditto.
	(vget): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
	(struct narrow_alu_def): Ditto.
	(struct reduc_alu_def): Ditto.
	(struct vundefined_def): Ditto.
	(struct misc_def): Ditto.
	(struct vset_def): Ditto.
	(struct vget_def): Ditto.
	(SHAPE): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
	(DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
	(DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
	(DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
	(DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_LMUL1_OPS): Ditto.
	(DEF_RVV_LMUL2_OPS): Ditto.
	(DEF_RVV_LMUL4_OPS): Ditto.
	(vint16mf4_t): Ditto.
	(vint16mf2_t): Ditto.
	(vint16m1_t): Ditto.
	(vint16m2_t): Ditto.
	(vint16m4_t): Ditto.
	(vint16m8_t): Ditto.
	(vint32mf2_t): Ditto.
	(vint32m1_t): Ditto.
	(vint32m2_t): Ditto.
	(vint32m4_t): Ditto.
	(vint32m8_t): Ditto.
	(vint64m1_t): Ditto.
	(vint64m2_t): Ditto.
	(vint64m4_t): Ditto.
	(vint64m8_t): Ditto.
	(vuint16mf4_t): Ditto.
	(vuint16mf2_t): Ditto.
	(vuint16m1_t): Ditto.
	(vuint16m2_t): Ditto.
	(vuint16m4_t): Ditto.
	(vuint16m8_t): Ditto.
	(vuint32mf2_t): Ditto.
	(vuint32m1_t): Ditto.
	(vuint32m2_t): Ditto.
	(vuint32m4_t): Ditto.
	(vuint32m8_t): Ditto.
	(vuint64m1_t): Ditto.
	(vuint64m2_t): Ditto.
	(vuint64m4_t): Ditto.
	(vuint64m8_t): Ditto.
	(vint8mf4_t): Ditto.
	(vint8mf2_t): Ditto.
	(vint8m1_t): Ditto.
	(vint8m2_t): Ditto.
	(vint8m4_t): Ditto.
	(vint8m8_t): Ditto.
	(vuint8mf4_t): Ditto.
	(vuint8mf2_t): Ditto.
	(vuint8m1_t): Ditto.
	(vuint8m2_t): Ditto.
	(vuint8m4_t): Ditto.
	(vuint8m8_t): Ditto.
	(vint8mf8_t): Ditto.
	(vuint8mf8_t): Ditto.
	(vfloat32mf2_t): Ditto.
	(vfloat32m1_t): Ditto.
	(vfloat32m2_t): Ditto.
	(vfloat32m4_t): Ditto.
	(vfloat64m1_t): Ditto.
	(vfloat64m2_t): Ditto.
	(vfloat64m4_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
	(DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
	(DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
	(DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
	(DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
	(DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
	(DEF_RVV_LMUL1_OPS): Ditto.
	(DEF_RVV_LMUL2_OPS): Ditto.
	(DEF_RVV_LMUL4_OPS): Ditto.
	(DEF_RVV_TYPE_INDEX): Ditto.
	(required_extensions_p): Adapt for new intrinsic support/
	(get_required_extensions): New function.
	(check_required_extensions): Ditto.
	(unsigned_base_type_p): Remove.
	(rvv_arg_type_info::get_scalar_ptr_type): New function.
	(get_mode_for_bitsize): Remove.
	(rvv_arg_type_info::get_scalar_const_ptr_type): New function.
	(rvv_arg_type_info::get_base_vector_type): Ditto.
	(rvv_arg_type_info::get_function_type_index): Ditto.
	(DEF_RVV_BASE_TYPE): New def.
	(function_builder::apply_predication): New class.
	(function_expander::mask_mode): Ditto.
	(function_checker::function_checker): Ditto.
	(function_checker::report_non_ice): Ditto.
	(function_checker::report_out_of_range): Ditto.
	(function_checker::require_immediate): Ditto.
	(function_checker::require_immediate_range): Ditto.
	(function_checker::check): Ditto.
	(check_builtin_call): Ditto.
	* config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
	(DEF_RVV_BASE_TYPE): Ditto.
	(DEF_RVV_TYPE_INDEX): Ditto.
	(vbool64_t): Ditto.
	(vbool32_t): Ditto.
	(vbool16_t): Ditto.
	(vbool8_t): Ditto.
	(vbool4_t): Ditto.
	(vbool2_t): Ditto.
	(vbool1_t): Ditto.
	(vuint8mf8_t): Ditto.
	(vuint8mf4_t): Ditto.
	(vuint8mf2_t): Ditto.
	(vuint8m1_t): Ditto.
	(vuint8m2_t): Ditto.
	(vint8m4_t): Ditto.
	(vuint8m4_t): Ditto.
	(vint8m8_t): Ditto.
	(vuint8m8_t): Ditto.
	(vint16mf4_t): Ditto.
	(vuint16mf2_t): Ditto.
	(vuint16m1_t): Ditto.
	(vuint16m2_t): Ditto.
	(vuint16m4_t): Ditto.
	(vuint16m8_t): Ditto.
	(vint32mf2_t): Ditto.
	(vuint32m1_t): Ditto.
	(vuint32m2_t): Ditto.
	(vuint32m4_t): Ditto.
	(vuint32m8_t): Ditto.
	(vuint64m1_t): Ditto.
	(vuint64m2_t): Ditto.
	(vuint64m4_t): Ditto.
	(vuint64m8_t): Ditto.
	(vfloat32mf2_t): Ditto.
	(vfloat32m1_t): Ditto.
	(vfloat32m2_t): Ditto.
	(vfloat32m4_t): Ditto.
	(vfloat32m8_t): Ditto.
	(vfloat64m1_t): Ditto.
	(vfloat64m4_t): Ditto.
	(vector): Move it def.
	(scalar): Ditto.
	(mask): Ditto.
	(signed_vector): Ditto.
	(unsigned_vector): Ditto.
	(unsigned_scalar): Ditto.
	(vector_ptr): Ditto.
	(scalar_ptr): Ditto.
	(scalar_const_ptr): Ditto.
	(void): Ditto.
	(size): Ditto.
	(ptrdiff): Ditto.
	(unsigned_long): Ditto.
	(long): Ditto.
	(eew8_index): Ditto.
	(eew16_index): Ditto.
	(eew32_index): Ditto.
	(eew64_index): Ditto.
	(shift_vector): Ditto.
	(double_trunc_vector): Ditto.
	(quad_trunc_vector): Ditto.
	(oct_trunc_vector): Ditto.
	(double_trunc_scalar): Ditto.
	(double_trunc_signed_vector): Ditto.
	(double_trunc_unsigned_vector): Ditto.
	(double_trunc_unsigned_scalar): Ditto.
	(double_trunc_float_vector): Ditto.
	(float_vector): Ditto.
	(lmul1_vector): Ditto.
	(widen_lmul1_vector): Ditto.
	(eew8_interpret): Ditto.
	(eew16_interpret): Ditto.
	(eew32_interpret): Ditto.
	(eew64_interpret): Ditto.
	(vlmul_ext_x2): Ditto.
	(vlmul_ext_x4): Ditto.
	(vlmul_ext_x8): Ditto.
	(vlmul_ext_x16): Ditto.
	(vlmul_ext_x32): Ditto.
	(vlmul_ext_x64): Ditto.
	* config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
	(struct function_type_info): New function.
	(struct rvv_arg_type_info): Ditto.
	(class function_checker): New class.
	(rvv_arg_type_info::get_scalar_type): New function.
	(rvv_arg_type_info::get_vector_type): Ditto.
	(function_expander::ret_mode): New function.
	(function_checker::arg_mode): Ditto.
	(function_checker::ret_mode): Ditto.
	* config/riscv/t-riscv: Add generator.
	* config/riscv/vector-iterators.md: New iterators.
	* config/riscv/vector.md (vundefined<mode>): New pattern.
	(@vundefined<mode>): Ditto.
	(@vreinterpret<mode>): Ditto.
	(@vlmul_extx2<mode>): Ditto.
	(@vlmul_extx4<mode>): Ditto.
	(@vlmul_extx8<mode>): Ditto.
	(@vlmul_extx16<mode>): Ditto.
	(@vlmul_extx32<mode>): Ditto.
	(@vlmul_extx64<mode>): Ditto.
	(*vlmul_extx2<mode>): Ditto.
	(*vlmul_extx4<mode>): Ditto.
	(*vlmul_extx8<mode>): Ditto.
	(*vlmul_extx16<mode>): Ditto.
	(*vlmul_extx32<mode>): Ditto.
	(*vlmul_extx64<mode>): Ditto.
	* config/riscv/genrvv-type-indexer.cc: New file.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/vlmul_v.c: New test.

Co-authored-by: kito-cheng <kito.cheng@sifive.com>

1 files changed, 20 insertions, 0 deletions

diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
index 220951f..ff07d31 100644
--- a/gcc/config/riscv/riscv-c.cc
+++ b/gcc/config/riscv/riscv-c.cc
@@ -184,10 +184,30 @@ riscv_pragma_intrinsic (cpp_reader *)
     error ("unknown %<#pragma riscv intrinsic%> option %qs", name);
 }
 
+/* Implement TARGET_CHECK_BUILTIN_CALL.  */
+static bool
+riscv_check_builtin_call (location_t loc, vec<location_t> arg_loc, tree fndecl,
+			  tree orig_fndecl, unsigned int nargs, tree *args)
+{
+  unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+  unsigned int subcode = code >> RISCV_BUILTIN_SHIFT;
+  switch (code & RISCV_BUILTIN_CLASS)
+    {
+    case RISCV_BUILTIN_GENERAL:
+      return true;
+
+    case RISCV_BUILTIN_VECTOR:
+      return riscv_vector::check_builtin_call (loc, arg_loc, subcode,
+					       orig_fndecl, nargs, args);
+    }
+  gcc_unreachable ();
+}
+
 /* Implement REGISTER_TARGET_PRAGMAS.  */
 
 void
 riscv_register_pragmas (void)
 {
+  targetm.check_builtin_call = riscv_check_builtin_call;
   c_register_pragma ("riscv", "intrinsic", riscv_pragma_intrinsic);
 }