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| author | Kazu Hirata <kazu@cs.umass.edu> | 2003-07-06 23:05:13 +0000 |
|---|---|---|
| committer | Kazu Hirata <kazu@gcc.gnu.org> | 2003-07-06 23:05:13 +0000 |
| commit | 2a43945fa59a5d450f24b2c47c35c8fef8f959a8 (patch) | |
| tree | d9b885f5b134494348b00445a56947b4f9f310d2 /gcc/config/mmix | |
| parent | 127b81366e7ee0700cec2733126fc35e85a59122 (diff) | |
| download | gcc-2a43945fa59a5d450f24b2c47c35c8fef8f959a8.zip gcc-2a43945fa59a5d450f24b2c47c35c8fef8f959a8.tar.gz gcc-2a43945fa59a5d450f24b2c47c35c8fef8f959a8.tar.bz2 | |
h8300.c: Fix comment typos.
* config/h8300/h8300.c: Fix comment typos.
* config/h8300/h8300.md: Likewise.
* config/i386/athlon.md: Likewise.
* config/i386/i386.c: Likewise.
* config/i386/pentium.md: Likewise.
* config/ia64/ia64.c: Likewise.
* config/ia64/itanium1.md: Likewise.
* config/ia64/itanium2.md: Likewise.
* config/m32r/m32r.md: Likewise.
* config/m68hc11/m68hc11.c: Likewise.
* config/mcore/mcore.c: Likewise.
* config/mips/sr71k.md: Likewise.
* config/mips/t-iris5-as: Likewise.
* config/mmix/mmix.h: Likewise.
* config/ns32k/ns32k.h: Likewise.
* config/ns32k/NOTES: Fix a typo.
From-SVN: r69021
Diffstat (limited to 'gcc/config/mmix')
| -rw-r--r-- | gcc/config/mmix/mmix.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/mmix/mmix.h b/gcc/config/mmix/mmix.h index 502dcfe..62a258e 100644 --- a/gcc/config/mmix/mmix.h +++ b/gcc/config/mmix/mmix.h @@ -169,7 +169,7 @@ extern int target_flags; address goes in a global register. When addressing, it's more like "base address plus offset", with the offset being 0..255 from the base, which itself can be a symbol plus an offset. The effect is like having - a constant pool in global registers, code offseting from those + a constant pool in global registers, code offsetting from those registers (automatically causing a request for a suitable constant base address register) without having to know the specific register or the specific offset. The setback is that there's a limited number of |