diff options
| author | Joseph Myers <joseph@codesourcery.com> | 2016-01-18 13:30:43 +0000 |
|---|---|---|
| committer | Joseph Myers <jsm28@gcc.gnu.org> | 2016-01-18 13:30:43 +0000 |
| commit | 969028053faeba62b856707b0ab5d49a15edc688 (patch) | |
| tree | ed219bc7dd87c22f3a1a998b28a5488637129bda /gcc/config/mips | |
| parent | 46ec7a061e006c4dcc717a895da0d2693432f49b (diff) | |
| download | gcc-969028053faeba62b856707b0ab5d49a15edc688.zip gcc-969028053faeba62b856707b0ab5d49a15edc688.tar.gz gcc-969028053faeba62b856707b0ab5d49a15edc688.tar.bz2 | |
Handle Octeon 3 not supporting MIPS paired-single instructions.
The Octeon 3 processor does not support the MIPS paired-single
instructions. This results in illegal instruction errors in the
testsuite when vectorization tests try to use those instructions.
This patch teaches the compiler about that lack of support, so that
warnings are given when -mpaired-single (or something implying it) is
used when compiling for such a processor. I chose to test
TARGET_OCTEON as the simplest conditional; since the older Octeon
processors don't support hard float at all, I don't think the choice
matters for them. Tests that then failed with the warning were
updated to disable them for Octeon.
Tested with no regressions for cross to mips64el-linux-gnu (Octeon
3).
gcc:
* config/mips/mips.h (ISA_HAS_PAIRED_SINGLE): Require
!TARGET_OCTEON.
gcc/testsuite:
* gcc.target/mips/mips-3d-1.c: Use forbid_cpu=octeon.* in
dg-options.
* gcc.target/mips/mips-3d-2.c: Likewise.
* gcc.target/mips/mips-3d-3.c: Likewise.
* gcc.target/mips/mips-3d-4.c: Likewise.
* gcc.target/mips/mips-3d-5.c: Likewise.
* gcc.target/mips/mips-3d-6.c: Likewise.
* gcc.target/mips/mips-3d-7.c: Likewise.
* gcc.target/mips/mips-3d-8.c: Likewise.
* gcc.target/mips/mips-3d-9.c: Likewise.
* gcc.target/mips/mips-ps-1.c: Likewise.
* gcc.target/mips/mips-ps-2.c: Likewise.
* gcc.target/mips/mips-ps-3.c: Likewise.
* gcc.target/mips/mips-ps-4.c: Likewise.
* gcc.target/mips/mips-ps-5.c: Likewise.
* gcc.target/mips/mips-ps-6.c: Likewise.
* gcc.target/mips/mips-ps-7.c: Likewise.
* gcc.target/mips/mips-ps-type.c: Likewise.
* gcc.target/mips/mips-ps-type-2.c: Likewise.
* gcc.target/mips/mips16-attributes-6.c: Likewise.
From-SVN: r232517
Diffstat (limited to 'gcc/config/mips')
| -rw-r--r-- | gcc/config/mips/mips.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 3097a41..803ab98 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1014,9 +1014,10 @@ struct mips_cpu_info { #define ISA_HAS_LXC1_SXC1 ISA_HAS_FP4 /* ISA has paired-single instructions. */ -#define ISA_HAS_PAIRED_SINGLE (ISA_MIPS64 \ - || (mips_isa_rev >= 2 \ - && mips_isa_rev <= 5)) +#define ISA_HAS_PAIRED_SINGLE ((ISA_MIPS64 \ + || (mips_isa_rev >= 2 \ + && mips_isa_rev <= 5)) \ + && !TARGET_OCTEON) /* ISA has conditional trap instructions. */ #define ISA_HAS_COND_TRAP (!ISA_MIPS1 \ |