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| author | Catherine Moore <clm@codesourcery.com> | 2011-04-20 12:54:32 -0400 |
|---|---|---|
| committer | Catherine Moore <clm@gcc.gnu.org> | 2011-04-20 12:54:32 -0400 |
| commit | 0eda40338e214245b14933f5ef6d73848f52f577 (patch) | |
| tree | 6b3f66d43639406c4f8e02ed7c2f8e2561c2c6f7 /gcc/config/mips | |
| parent | 01475747254ace9b52d6c62779639bffbf5b6c45 (diff) | |
| download | gcc-0eda40338e214245b14933f5ef6d73848f52f577.zip gcc-0eda40338e214245b14933f5ef6d73848f52f577.tar.gz gcc-0eda40338e214245b14933f5ef6d73848f52f577.tar.bz2 | |
mips.opt (mfix-24k): New.
2011-04-20 Catherine Moore <clm@codesourcery.com>
* config/mips/mips.opt (mfix-24k): New.
* config/mips/mips.h (ASM_SPEC): Handle -mfix-24k.
* config/mips/mips.md (length): Increase by 4 for stores if
fixing 24K errata.
* config/mips/mips.c (mips_reorg_process_insns): Do not allow
all noreorder if fixing 24K errata.
* doc/invoke.texi: Document mfix-24k.
From-SVN: r172780
Diffstat (limited to 'gcc/config/mips')
| -rw-r--r-- | gcc/config/mips/mips.c | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.h | 1 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 4 | ||||
| -rw-r--r-- | gcc/config/mips/mips.opt | 4 |
4 files changed, 11 insertions, 4 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index e075c4f..55d3e9f 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -14886,9 +14886,9 @@ mips_reorg_process_insns (void) if (crtl->profile) cfun->machine->all_noreorder_p = false; - /* Code compiled with -mfix-vr4120 can't be all noreorder because - we rely on the assembler to work around some errata. */ - if (TARGET_FIX_VR4120) + /* Code compiled with -mfix-vr4120 or -mfix-24k can't be all noreorder + because we rely on the assembler to work around some errata. */ + if (TARGET_FIX_VR4120 || TARGET_FIX_24K) cfun->machine->all_noreorder_p = false; /* The same is true for -mfix-vr4130 if we might generate MFLO or diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index ba226bf..1c1917c 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1134,6 +1134,7 @@ enum mips_code_readable_setting { %{msmartmips} %{mno-smartmips} \ %{mmt} %{mno-mt} \ %{mfix-vr4120} %{mfix-vr4130} \ +%{mfix-24k} \ %(subtarget_asm_optimizing_spec) \ %(subtarget_asm_debugging_spec) \ %{mabi=*} %{!mabi=*: %(asm_abi_default_spec)} \ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index c5276c0..d7e59f8 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -479,7 +479,9 @@ (eq_attr "move_type" "load,fpload") (symbol_ref "mips_load_store_insns (operands[1], insn) * 4") (eq_attr "move_type" "store,fpstore") - (symbol_ref "mips_load_store_insns (operands[0], insn) * 4") + (cond [(eq (symbol_ref "TARGET_FIX_24K") (const_int 0)) + (symbol_ref "mips_load_store_insns (operands[0], insn) * 4")] + (symbol_ref "mips_load_store_insns (operands[0], insn) * 4 + 4")) ;; In the worst case, a call macro will take 8 instructions: ;; diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index 20b0b6c..4ce3c40 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -110,6 +110,10 @@ mextern-sdata Target Report Var(TARGET_EXTERN_SDATA) Init(1) Use -G for data that is not defined by the current object +mfix-24k +Target Report Var(TARGET_FIX_24K) +Work around certain 24K errata + mfix-r4000 Target Report Mask(FIX_R4000) Work around certain R4000 errata |