haifa-sched.c: Convert to target hooks.

	* haifa-sched.c: Convert to target hooks.  Macros replaced
	are ISSUE_RATE, ADJUST_COST, ADJUST_PRIORITY, MD_SCHED_INIT,
	MD_SCHED_REORDER, MD_SCHED_REORDER2, MD_SCHED_VARIABLE_ISSUE,
	MD_SCHED_FINISH, and HAVE_cycle_display.
	* target-def.h (TARGET_SCHED_ADJUST_COST,
	TARGET_SCHED_ADJUST_PRIORITY, TARGET_SCHED_ISSUE_RATE,
	TARGET_SCHED_VARIABLE_ISSUE, TARGET_SCHED_INIT,
	TARGET_SCHED_FINISH, TARGET_SCHED_REORDER,
	TARGET_SCHED_REORDER2, TARGET_SCHED_CYCLE_DISPLAY):
	New hook #defines to be overridden.
	(TARGET_SCHED): Bring them all together.
	(TARGET_INITIALIZER): Update.
	* target.h: Don't forward declare struct rtx_def.  Use 'rtx'
	instead of 'struct rtx_def *' throughout.
	(struct sched): New set of hooks for the scheduler.
	* Makefile.in (haifa-sched.o): Depend on target.h.
	* doc/tm.texi: Document the new scheduler hooks, together in
	their own section, instead of scattered around.
	Fix a bunch of underfull/overfull hboxes.

	* a29k.h, alpha.h, arm.h, c4x.h, convex.h, d30v.h, i386.h,
	ia64.h, m32r.h, m88k.h, mips.h, pa.h, rs6000.h, s390.h, sh.h,
	sparc.h: Don't define any of the old scheduler macros.

	* a29k.c, alpha.c, arm.c, c4x.c, convex.c, d30v.c, i386.c,
	ia64.c, m32r.c, m88k.c, mips.c, pa.c, rs6000.c, s390.c, sh.c,
	sparc.c: Create hook functions from code extracted from
	corresponding target header, or make existing hooks static, as
	appropriate.  Set the appropriate entries in targetm.

	* alpha-protos.h, arm-protos.h, c4x-protos.h, d30v-protos.h,
	i386-protos.h, ia64-protos.h, m32r-protos.h, pa-protos.h,
	rs6000-protos.h, s390-protos.h, sparc-protos.h:
	Remove prototypes for functions which are now static.

	* d30v.h, d30v.c, m32r.h, m32r.c: Remove #ifdef HAIFA and
	related gunk; the Haifa scheduler is now the only choice.

From-SVN: r45009

1 files changed, 4 insertions, 57 deletions

diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h
index 692249b..5ef9951 100644
--- a/gcc/config/m32r/m32r.h
+++ b/gcc/config/m32r/m32r.h
@@ -154,8 +154,8 @@ extern int target_flags;
 #define TARGET_ALIGN_LOOPS 	(target_flags & TARGET_ALIGN_LOOPS_MASK)
 
 /* Change issue rate.  */
-#define TARGET_ISSUE_RATE_MASK	(1 << 3)
-#define TARGET_ISSUE_RATE	(target_flags & TARGET_ISSUE_RATE_MASK)
+#define TARGET_LOW_ISSUE_RATE_MASK	(1 << 3)
+#define TARGET_LOW_ISSUE_RATE	(target_flags & TARGET_LOW_ISSUE_RATE_MASK)
 
 /* Change branch cost */
 #define TARGET_BRANCH_COST_MASK	(1 << 4)
@@ -187,9 +187,9 @@ extern int target_flags;
     { "align-loops",		TARGET_ALIGN_LOOPS_MASK, 		\
 	N_("Align all loops to 32 byte boundary") },			\
     { "no-align-loops",		-TARGET_ALIGN_LOOPS_MASK, "" },		\
-    { "issue-rate=1",		TARGET_ISSUE_RATE_MASK, 		\
+    { "issue-rate=1",		TARGET_LOW_ISSUE_RATE_MASK, 		\
 	N_("Only issue one instruction per cycle") },			\
-    { "issue-rate=2",		-TARGET_ISSUE_RATE_MASK, "" },		\
+    { "issue-rate=2",		-TARGET_LOW_ISSUE_RATE_MASK, "" },	\
     { "branch-cost=1",		TARGET_BRANCH_COST_MASK, 		\
 	N_("Prefer branches over conditional execution") },		\
     { "branch-cost=2",		-TARGET_BRANCH_COST_MASK, "" },		\
@@ -1473,59 +1473,6 @@ do {									\
    register.  */
 #define NO_RECURSIVE_FUNCTION_CSE
 
-/* A C statement (sans semicolon) to update the integer variable COST based on
-   the relationship between INSN that is dependent on DEP_INSN through the
-   dependence LINK.  The default is to make no adjustment to COST.  This can be
-   used for example to specify to the scheduler that an output- or
-   anti-dependence does not incur the same cost as a data-dependence.  */
-
-#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
-  (COST) = m32r_adjust_cost (INSN, LINK, DEP_INSN, COST)
-
-/* A C statement (sans semicolon) to update the integer scheduling
-   priority `INSN_PRIORITY(INSN)'.  Reduce the priority to execute
-   the INSN earlier, increase the priority to execute INSN later.
-   Do not define this macro if you do not need to adjust the
-   scheduling priorities of insns.  */
-#define ADJUST_PRIORITY(INSN) \
-  INSN_PRIORITY (INSN) = m32r_adjust_priority (INSN, INSN_PRIORITY (INSN))
-
-/* Macro to determine whether the Haifa scheduler is used.  */
-#ifdef HAIFA
-#define HAIFA_P 1
-#else
-#define HAIFA_P 0
-#endif
-
-/* Indicate how many instructions can be issued at the same time.
-   This is sort of a lie.  The m32r can issue only 1 long insn at
-   once, but it can issue 2 short insns.  The default therefore is
-   set at 2, but this can be overridden by the command line option
-   -missue-rate=1 */
-#define ISSUE_RATE ((TARGET_ISSUE_RATE) ? 1 : 2)
-
-/* If we have a machine that can issue a variable # of instructions
-   per cycle, indicate how many more instructions can be issued
-   after the current one.  */
-#define MD_SCHED_VARIABLE_ISSUE(STREAM, VERBOSE, INSN, HOW_MANY)	\
-(HOW_MANY) = m32r_sched_variable_issue (STREAM, VERBOSE, INSN, HOW_MANY)
-
-/* Whether we are on an odd word boundary while scheduling.  */
-extern int m32r_sched_odd_word_p;
-
-/* Hook to run before scheduling a block of insns.  */
-#define MD_SCHED_INIT(STREAM, VERBOSE, MAX_READY) \
-  m32r_sched_init (STREAM, VERBOSE)
-
-/* Hook to reorder the list of ready instructions.  */
-#define MD_SCHED_REORDER(STREAM, VERBOSE, READY, N_READY, CLOCK, CIM) 	\
-  do									\
-    {									\
-      m32r_sched_reorder (STREAM, VERBOSE, READY, N_READY);		\
-      CIM = issue_rate;							\
-    }									\
-  while (0)
-
 /* When the `length' insn attribute is used, this macro specifies the
    value to be assigned to the address of the first insn in a
    function.  If not specified, 0 is used.  */