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author | Kazu Hirata <kazu@cs.umass.edu> | 2002-09-20 23:47:00 +0000 |
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committer | Kazu Hirata <kazu@gcc.gnu.org> | 2002-09-20 23:47:00 +0000 |
commit | a0ab749a7a4795cd0ad8762001fb0ae076ca68ea (patch) | |
tree | fda5c473683c0b2fa65d1aab8f3ebaab96576610 /gcc/config/m32r/m32r.c | |
parent | 2f0da74c47f38593e6e5d21eed97d9c4447fd88e (diff) | |
download | gcc-a0ab749a7a4795cd0ad8762001fb0ae076ca68ea.zip gcc-a0ab749a7a4795cd0ad8762001fb0ae076ca68ea.tar.gz gcc-a0ab749a7a4795cd0ad8762001fb0ae076ca68ea.tar.bz2 |
m32r.c: Follow spelling conventions.
* config/m32r/m32r.c: Follow spelling conventions.
* config/m32r/m32r.h: Likewise.
* config/m32r/m32r.md: Likewise.
* config/m68k/m68k.c: Likewise.
* config/m88k/m88k.c: Likewise.
* config/mcore/mcore.c: Likewise.
* config/mips/mips.c: Likewise.
* config/mips/mips.h: Likewise.
* config/mmix/mmix.c: Likewise.
* config/mn10200/mn10200.c: Likewise.
* config/ns32k/ns32k.h: Likewise.
* config/pa/pa.c: Likewise.
* config/pa/pa64-linux.h: Likewise.
* config/pdp11/pdp11.h: Likewise.
* config/romp/romp.c: Likewise.
* config/romp/romp.h: Likewise.
* config/rs6000/eabi.asm: Likewise.
* config/rs6000/linux64.h: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/rs6000/rs6000.h: Likewise.
* config/rs6000/rs6000.md: Likewise.
* config/rs6000/sysv4.h: Likewise.
* config/rs6000/xcoff.h: Likewise.
From-SVN: r57376
Diffstat (limited to 'gcc/config/m32r/m32r.c')
-rw-r--r-- | gcc/config/m32r/m32r.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index c3bd1a0..b3c0767 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -1029,7 +1029,7 @@ extend_operand (op, mode) } } -/* Return non-zero if the operand is an insn that is a small insn. +/* Return nonzero if the operand is an insn that is a small insn. Allow const_int 0 as well, which is a placeholder for NOP slots. */ int @@ -1046,7 +1046,7 @@ small_insn_p (op, mode) return get_attr_length (op) == 2; } -/* Return non-zero if the operand is an insn that is a large insn. */ +/* Return nonzero if the operand is an insn that is a large insn. */ int large_insn_p (op, mode) @@ -2181,7 +2181,7 @@ m32r_output_function_epilogue (file, size) m32r_compute_function_type (NULL_TREE); } -/* Return non-zero if this function is known to have a null or 1 instruction +/* Return nonzero if this function is known to have a null or 1 instruction epilogue. */ int @@ -2590,7 +2590,7 @@ zero_and_one (operand1, operand2) ||((INTVAL (operand1) == 1) && (INTVAL (operand2) == 0))); } -/* Return non-zero if the operand is suitable for use in a conditional move sequence. */ +/* Return nonzero if the operand is suitable for use in a conditional move sequence. */ int conditional_move_operand (operand, mode) rtx operand; @@ -2862,7 +2862,7 @@ m32r_output_block_move (insn, operands) stores are done without any increment, then the remaining ones can use the pre-increment addressing mode. - Note: expand_block_move() also relies upon this behaviour when building + Note: expand_block_move() also relies upon this behavior when building loops to copy large blocks. */ first_time = 1; |