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authorUros Bizjak <uros@gcc.gnu.org>2009-03-05 08:34:16 +0100
committerUros Bizjak <uros@gcc.gnu.org>2009-03-05 08:34:16 +0100
commit6c6094f12fae0fe23eb390a115645d78f82a42c1 (patch)
treeb68449fdd33093d4d346ef846fa9dbcf88b3da3a /gcc/config/i386
parentd095e03c25490c14ec610ce9ce4749f3e908a752 (diff)
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i386.md (R8_REG, R9_REG): New constants.
* config/i386/i386.md (R8_REG, R9_REG): New constants. * config/i386/i386.h (CONDITIONAL_REGISTER_USAGE): Use named constants instead of magic numbers. (HARD_REGNO_CALLER_SAVE_MODE): Ditto. (QI_REG_P): Ditto. * config/i386/i386.c (x86_64_int_parameter_registers): Ditto. (x86_64_ms_abi_int_parameter_registers): Ditto. (x86_64_int_return_registers): Ditto. (ix86_expand_call): Ditto for clobbered_registers array. (ix86_hard_regno_mode_ok): Ditto. (x86_extended_QIreg_mentioned_p): Ditto. From-SVN: r144638
Diffstat (limited to 'gcc/config/i386')
-rw-r--r--gcc/config/i386/i386.c47
-rw-r--r--gcc/config/i386/i386.h15
-rw-r--r--gcc/config/i386/i386.md2
3 files changed, 36 insertions, 28 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 120ab15..4f7f943 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1533,24 +1533,8 @@ int const dbx_register_map[FIRST_PSEUDO_REGISTER] =
-1, -1, -1, -1, -1, -1, -1, -1, /* extended SSE registers */
};
-static int const x86_64_int_parameter_registers[6] =
-{
- 5 /*RDI*/, 4 /*RSI*/, 1 /*RDX*/, 2 /*RCX*/,
- FIRST_REX_INT_REG /*R8 */, FIRST_REX_INT_REG + 1 /*R9 */
-};
-
-static int const x86_64_ms_abi_int_parameter_registers[4] =
-{
- 2 /*RCX*/, 1 /*RDX*/,
- FIRST_REX_INT_REG /*R8 */, FIRST_REX_INT_REG + 1 /*R9 */
-};
-
-static int const x86_64_int_return_registers[4] =
-{
- 0 /*RAX*/, 1 /*RDX*/, 5 /*RDI*/, 4 /*RSI*/
-};
-
/* The "default" register map used in 64bit mode. */
+
int const dbx64_register_map[FIRST_PSEUDO_REGISTER] =
{
0, 1, 2, 3, 4, 5, 6, 7, /* general regs */
@@ -1634,6 +1618,23 @@ rtx ix86_compare_op0 = NULL_RTX;
rtx ix86_compare_op1 = NULL_RTX;
rtx ix86_compare_emitted = NULL_RTX;
+/* Define parameter passing and return registers. */
+
+static int const x86_64_int_parameter_registers[6] =
+{
+ DI_REG, SI_REG, DX_REG, CX_REG, R8_REG, R9_REG
+};
+
+static int const x86_64_ms_abi_int_parameter_registers[4] =
+{
+ CX_REG, DX_REG, R8_REG, R9_REG
+};
+
+static int const x86_64_int_return_registers[4] =
+{
+ AX_REG, DX_REG, DI_REG, SI_REG
+};
+
/* Define the structure for the machine field in struct function. */
struct stack_local_entry GTY(())
@@ -18684,8 +18685,12 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
by SYSV calls. */
if (ix86_cfun_abi () == MS_ABI && function_call_abi == SYSV_ABI)
{
- static int clobbered_registers[] = {27, 28, 45, 46, 47, 48, 49, 50, 51,
- 52, SI_REG, DI_REG};
+ static int clobbered_registers[] = {
+ XMM6_REG, XMM7_REG, XMM8_REG,
+ XMM9_REG, XMM10_REG, XMM11_REG,
+ XMM12_REG, XMM13_REG, XMM14_REG,
+ XMM15_REG, SI_REG, DI_REG
+ };
unsigned int i;
rtx vec[ARRAY_SIZE (clobbered_registers) + 2];
rtx unspec = gen_rtx_UNSPEC (VOIDmode, gen_rtvec (1, const0_rtx),
@@ -25757,7 +25762,7 @@ ix86_hard_regno_mode_ok (int regno, enum machine_mode mode)
{
/* Take care for QImode values - they can be in non-QI regs,
but then they do cause partial register stalls. */
- if (regno < 4 || TARGET_64BIT)
+ if (regno <= BX_REG || TARGET_64BIT)
return 1;
if (!TARGET_PARTIAL_REG_STALL)
return 1;
@@ -26869,7 +26874,7 @@ x86_extended_QIreg_mentioned_p (rtx insn)
extract_insn_cached (insn);
for (i = 0; i < recog_data.n_operands; i++)
if (REG_P (recog_data.operand[i])
- && REGNO (recog_data.operand[i]) >= 4)
+ && REGNO (recog_data.operand[i]) > BX_REG)
return true;
return false;
}
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 5bdf379..f2f4448 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -938,10 +938,10 @@ do { \
&& ((cfun && cfun->machine->call_abi == MS_ABI) \
|| (!cfun && DEFAULT_ABI == MS_ABI))) \
{ \
- call_used_regs[4 /*RSI*/] = 0; \
- call_used_regs[5 /*RDI*/] = 0; \
- call_used_regs[27 /*XMM6*/] = 0; \
- call_used_regs[28 /*XMM7*/] = 0; \
+ call_used_regs[SI_REG] = 0; \
+ call_used_regs[DI_REG] = 0; \
+ call_used_regs[XMM6_REG] = 0; \
+ call_used_regs[XMM7_REG] = 0; \
for (i = FIRST_REX_SSE_REG; i <= LAST_REX_SSE_REG; i++) \
call_used_regs[i] = 0; \
} \
@@ -1073,7 +1073,7 @@ do { \
: (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode \
: (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false) \
: (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode \
- : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode \
+ : (MODE) == QImode && (REGNO) > BX_REG && !TARGET_64BIT ? SImode \
: (MODE))
/* Specify the registers used for certain standard purposes.
@@ -1310,7 +1310,7 @@ enum reg_class
#define SMALL_REGISTER_CLASSES 1
-#define QI_REG_P(X) (REG_P (X) && REGNO (X) < 4)
+#define QI_REG_P(X) (REG_P (X) && REGNO (X) <= BX_REG)
#define GENERAL_REGNO_P(N) \
((N) <= STACK_POINTER_REGNUM || REX_INT_REGNO_P (N))
@@ -1508,7 +1508,8 @@ enum reg_class
prologue and apilogue. This is not possible without
ACCUMULATE_OUTGOING_ARGS. */
-#define ACCUMULATE_OUTGOING_ARGS (TARGET_ACCUMULATE_OUTGOING_ARGS || ix86_cfun_abi () == MS_ABI)
+#define ACCUMULATE_OUTGOING_ARGS \
+ (TARGET_ACCUMULATE_OUTGOING_ARGS || ix86_cfun_abi () == MS_ABI)
/* If defined, a C expression whose value is nonzero when we want to use PUSH
instructions to pass outgoing arguments. */
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 9c6ae1c..761a5e7 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -291,6 +291,8 @@
(MM5_REG 34)
(MM6_REG 35)
(MM7_REG 36)
+ (R8_REG 37)
+ (R9_REG 38)
(R10_REG 39)
(R11_REG 40)
(R13_REG 42)