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| author | Uros Bizjak <ubizjak@gmail.com> | 2017-05-15 21:04:35 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2017-05-15 21:04:35 +0200 |
| commit | f108770a8969f0a41463437208a62f9044810c49 (patch) | |
| tree | 96a3db91e9aaf90260edf48240bc63ad32d1a095 /gcc/config/i386 | |
| parent | e30ce0a36c89794543381b3699cc23011af4e85c (diff) | |
| download | gcc-f108770a8969f0a41463437208a62f9044810c49.zip gcc-f108770a8969f0a41463437208a62f9044810c49.tar.gz gcc-f108770a8969f0a41463437208a62f9044810c49.tar.bz2 | |
i386.i386.md (*zero_extendsidi2): Do not penalize non-interunit SSE move alternatives with '?'.
* config/i386.i386.md (*zero_extendsidi2): Do not penalize
non-interunit SSE move alternatives with '?'.
(zero-extendsidi peephole2): New peephole to skip intermediate
general register in SSE zero-extend sequence.
testsuite/ChangeLog:
* gcc.target/i386/pr80425-1.c: New test.
* gcc.target/i386/pr80425-2.c: Ditto.
From-SVN: r248070
Diffstat (limited to 'gcc/config/i386')
| -rw-r--r-- | gcc/config/i386/i386.md | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index da79d8f..6aca64b 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3762,10 +3762,10 @@ (define_insn "*zero_extendsidi2" [(set (match_operand:DI 0 "nonimmediate_operand" - "=r,?r,?o,r ,o,?*Ym,?!*y,?r ,?r,?*Yi,?*x,?*x,?*v,*r") + "=r,?r,?o,r ,o,?*Ym,?!*y,?r ,?r,?*Yi,*x,*x,*v,*r") (zero_extend:DI (match_operand:SI 1 "x86_64_zext_operand" - "0 ,rm,r ,rmWz,0,r ,m ,*Yj,*x,r ,m , *x, *v,*k")))] + "0 ,rm,r ,rmWz,0,r ,m ,*Yj,*x,r ,m ,*x,*v,*k")))] "" { switch (get_attr_type (insn)) @@ -3885,6 +3885,15 @@ (set (match_dup 4) (const_int 0))] "split_double_mode (DImode, &operands[0], 1, &operands[3], &operands[4]);") +(define_peephole2 + [(set (match_operand:DI 0 "general_reg_operand") + (zero_extend:DI (match_operand:SI 1 "nonimmediate_gr_operand"))) + (set (match_operand:DI 2 "sse_reg_operand") (match_dup 0))] + "TARGET_64BIT && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC + && peep2_reg_dead_p (2, operands[0])" + [(set (match_dup 2) + (zero_extend:DI (match_dup 1)))]) + (define_mode_attr kmov_isa [(QI "avx512dq") (HI "avx512f") (SI "avx512bw") (DI "avx512bw")]) |