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| author | konglin1 <lingling.kong@intel.com> | 2022-11-08 10:58:36 +0800 |
|---|---|---|
| committer | konglin1 <lingling.kong@intel.com> | 2022-11-08 11:00:47 +0800 |
| commit | 1f7b13005040a5ad1ea0670dcd6a7b0842248978 (patch) | |
| tree | 31d0982f9bc8c1d3e2bf3f6b4aae4f2f286be0cc /gcc/config/i386 | |
| parent | a14598bf86f6950012e3d68cff14fcceec566ef7 (diff) | |
| download | gcc-1f7b13005040a5ad1ea0670dcd6a7b0842248978.zip gcc-1f7b13005040a5ad1ea0670dcd6a7b0842248978.tar.gz gcc-1f7b13005040a5ad1ea0670dcd6a7b0842248978.tar.bz2 | |
Revert "i386: Prefer remote atomic insn for atomic_fetch{add, and, or, xor}"
This reverts commit 48fa4131e419942efc9dd762694fdc7e819de392.
Diffstat (limited to 'gcc/config/i386')
| -rw-r--r-- | gcc/config/i386/i386.opt | 4 | ||||
| -rw-r--r-- | gcc/config/i386/sync.md | 27 |
2 files changed, 3 insertions, 28 deletions
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index abb1e5e..415c52e 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -1246,7 +1246,3 @@ Support PREFETCHI built-in functions and code generation. mraoint Target Mask(ISA2_RAOINT) Var(ix86_isa_flags2) Save Support RAOINT built-in functions and code generation. - -mprefer-remote-atomic -Target Var(flag_prefer_remote_atomic) Init(0) -Prefer use remote atomic insn for atomic operations. diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index 2508991..e6543a5 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -791,28 +791,7 @@ (define_code_iterator any_plus_logic [and ior xor plus]) (define_code_attr plus_logic [(and "and") (ior "or") (xor "xor") (plus "add")]) -(define_expand "atomic_<plus_logic><mode>" - [(match_operand:SWI 0 "memory_operand") - (any_plus_logic:SWI (match_dup 0) - (match_operand:SWI 1 "nonmemory_operand")) - (match_operand:SI 2 "const_int_operand")] - "" -{ - if (flag_prefer_remote_atomic - && TARGET_RAOINT && operands[2] == const0_rtx - && (<MODE>mode == SImode || <MODE>mode == DImode)) - { - if (CONST_INT_P (operands[1])) - operands[1] = force_reg (<MODE>mode, operands[1]); - emit_insn (maybe_gen_rao_a (<CODE>, <MODE>mode, operands[0], operands[1])); - } - else - emit_insn (gen_atomic_<plus_logic><mode>_1 (operands[0], operands[1], - operands[2])); - DONE; -}) - -(define_insn "@rao_a<plus_logic><mode>" +(define_insn "rao_a<plus_logic><mode>" [(set (match_operand:SWI48 0 "memory_operand" "+m") (unspec_volatile:SWI48 [(any_plus_logic:SWI48 (match_dup 0) @@ -822,7 +801,7 @@ "TARGET_RAOINT" "a<plus_logic>\t{%1, %0|%0, %1}") -(define_insn "atomic_add<mode>_1" +(define_insn "atomic_add<mode>" [(set (match_operand:SWI 0 "memory_operand" "+m") (unspec_volatile:SWI [(plus:SWI (match_dup 0) @@ -876,7 +855,7 @@ return "lock{%;} %K2sub{<imodesuffix>}\t{%1, %0|%0, %1}"; }) -(define_insn "atomic_<logic><mode>_1" +(define_insn "atomic_<logic><mode>" [(set (match_operand:SWI 0 "memory_operand" "+m") (unspec_volatile:SWI [(any_logic:SWI (match_dup 0) |