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| author | Richard Henderson <rth@redhat.com> | 2005-04-14 10:46:08 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2005-04-14 10:46:08 -0700 |
| commit | ae46a07ab21e91142e17d990a0a21fbd65087ae5 (patch) | |
| tree | a6d275bbd5eaa29b0d58b9391c0d8b5f6b5c84f7 /gcc/config/i386/sse.md | |
| parent | 25f710babd7b217d9dccbdc3d46fd3d9e1c96a92 (diff) | |
| download | gcc-ae46a07ab21e91142e17d990a0a21fbd65087ae5.zip gcc-ae46a07ab21e91142e17d990a0a21fbd65087ae5.tar.gz gcc-ae46a07ab21e91142e17d990a0a21fbd65087ae5.tar.bz2 | |
i386.c (ix86_expand_sse_cmp): Split out from ...
* config/i386/i386.c (ix86_expand_sse_cmp): Split out from ...
(ix86_expand_sse_movcc): ... here. Take cmp as a pre-computed
register.
(ix86_expand_fp_movcc): Update to match.
(ix86_expand_fp_vcond, ix86_expand_int_vcond): New.
* config/i386/i386-protos.h: Update.
* config/i386/sse.md (vcondv4sf, vcondv2df): New.
(vcond<SSEMODE124>, vcondu<SSEMODE12>): New.
* lib/target-supports.exp (check_effective_target_vect_condition):
Add ia64, i?86, and x86_64.
From-SVN: r98146
Diffstat (limited to 'gcc/config/i386/sse.md')
| -rw-r--r-- | gcc/config/i386/sse.md | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index eca5486..0f6c7ea 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -710,6 +710,22 @@ [(set_attr "type" "ssecomi") (set_attr "mode" "SF")]) +(define_expand "vcondv4sf" + [(set (match_operand:V4SF 0 "register_operand" "") + (if_then_else:V4SF + (match_operator 3 "" + [(match_operand:V4SF 4 "nonimmediate_operand" "") + (match_operand:V4SF 5 "nonimmediate_operand" "")]) + (match_operand:V4SF 1 "general_operand" "") + (match_operand:V4SF 2 "general_operand" "")))] + "TARGET_SSE" +{ + if (ix86_expand_fp_vcond (operands)) + DONE; + else + FAIL; +}) + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Parallel single-precision floating point logical operations @@ -1648,6 +1664,22 @@ [(set_attr "type" "ssecomi") (set_attr "mode" "DF")]) +(define_expand "vcondv2df" + [(set (match_operand:V2DF 0 "register_operand" "") + (if_then_else:V2DF + (match_operator 3 "" + [(match_operand:V2DF 4 "nonimmediate_operand" "") + (match_operand:V2DF 5 "nonimmediate_operand" "")]) + (match_operand:V2DF 1 "general_operand" "") + (match_operand:V2DF 2 "general_operand" "")))] + "TARGET_SSE2" +{ + if (ix86_expand_fp_vcond (operands)) + DONE; + else + FAIL; +}) + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Parallel double-precision floating point logical operations @@ -2602,6 +2634,38 @@ [(set_attr "type" "ssecmp") (set_attr "mode" "TI")]) +(define_expand "vcond<mode>" + [(set (match_operand:SSEMODE124 0 "register_operand" "") + (if_then_else:SSEMODE124 + (match_operator 3 "" + [(match_operand:SSEMODE124 4 "nonimmediate_operand" "") + (match_operand:SSEMODE124 5 "nonimmediate_operand" "")]) + (match_operand:SSEMODE124 1 "general_operand" "") + (match_operand:SSEMODE124 2 "general_operand" "")))] + "TARGET_SSE2" +{ + if (ix86_expand_int_vcond (operands, false)) + DONE; + else + FAIL; +}) + +(define_expand "vcondu<mode>" + [(set (match_operand:SSEMODE12 0 "register_operand" "") + (if_then_else:SSEMODE12 + (match_operator 3 "" + [(match_operand:SSEMODE12 4 "nonimmediate_operand" "") + (match_operand:SSEMODE12 5 "nonimmediate_operand" "")]) + (match_operand:SSEMODE12 1 "general_operand" "") + (match_operand:SSEMODE12 2 "general_operand" "")))] + "TARGET_SSE2" +{ + if (ix86_expand_int_vcond (operands, true)) + DONE; + else + FAIL; +}) + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Parallel integral logical operations |