i386.md (rdpmc): Remove expander.

	* config/i386/i386.md (rdpmc): Remove expander.
	(rdtsc): Ditto.
	(rdtscp): Ditto.
	(rdpmc): Rename from *rdpmc.
	(rdpmc_rex64): Rename from *rdpmc_rex64.
	(rdtsc): Rename from *rdtsc.
	(rdtsc_rex64): Rename from *rdtsc_rex64.
	(rdtscp): Rename from *rdtscp.
	(rdtscp_rex64): Rename from *rdtscp_rex64.

	* config/i386/i386.c (struct builtin_description bdesc_special_args)
	<IX86_BUILTIN_RDTSC>: Use CODE_FOR_NOTHING.
	<IX86_BUILTIN_RDTSCP>: Ditto.
	(struct builtin_description bdesc__args) <IX86_BUILTIN_RDPMC>: Ditto.
	(ix86_expand_builtin) <IX86_BUILTIN_{RDPMC,RDTSC,RDTSCP}>: Handle here.

From-SVN: r192589

1 files changed, 9 insertions, 109 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index fa10cb4..299115d 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -17975,40 +17975,7 @@
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
-(define_expand "rdpmc"
-  [(match_operand:DI 0 "register_operand")
-   (match_operand:SI 1 "register_operand")]
-  ""
-{
-  rtx reg = gen_reg_rtx (DImode);
-  rtx si;
-
-  si = gen_rtx_UNSPEC_VOLATILE (DImode, gen_rtvec (1, operands[1]),
-				UNSPECV_RDPMC);
-
-  if (TARGET_64BIT)
-    {
-      rtvec vec = rtvec_alloc (2);
-      rtx load = gen_rtx_PARALLEL (VOIDmode, vec);
-      rtx upper = gen_reg_rtx (DImode);
-      rtx di = gen_rtx_UNSPEC_VOLATILE (DImode,
-					gen_rtvec (1, const0_rtx),
-					UNSPECV_RDPMC);
-      RTVEC_ELT (vec, 0) = gen_rtx_SET (VOIDmode, reg, si);
-      RTVEC_ELT (vec, 1) = gen_rtx_SET (VOIDmode, upper, di);
-      emit_insn (load);
-      upper = expand_simple_binop (DImode, ASHIFT, upper, GEN_INT (32),
-				   NULL, 1, OPTAB_DIRECT);
-      reg = expand_simple_binop (DImode, IOR, reg, upper, reg, 1,
-				 OPTAB_DIRECT);
-    }
-  else
-    emit_insn (gen_rtx_SET (VOIDmode, reg, si));
-  emit_insn (gen_rtx_SET (VOIDmode, operands[0], reg));
-  DONE;
-})
-
-(define_insn "*rdpmc"
+(define_insn "rdpmc"
   [(set (match_operand:DI 0 "register_operand" "=A")
   	(unspec_volatile:DI [(match_operand:SI 1 "register_operand" "c")]
 			    UNSPECV_RDPMC))]
@@ -18017,44 +17984,18 @@
   [(set_attr "type" "other")
    (set_attr "length" "2")])
 
-(define_insn "*rdpmc_rex64"
+(define_insn "rdpmc_rex64"
   [(set (match_operand:DI 0 "register_operand" "=a")
   	(unspec_volatile:DI [(match_operand:SI 2 "register_operand" "c")]
 			    UNSPECV_RDPMC))
-  (set (match_operand:DI 1 "register_operand" "=d")
-       (unspec_volatile:DI [(const_int 0)] UNSPECV_RDPMC))]
+   (set (match_operand:DI 1 "register_operand" "=d")
+	(unspec_volatile:DI [(match_dup 2)] UNSPECV_RDPMC))]
   "TARGET_64BIT"
   "rdpmc"
   [(set_attr "type" "other")
    (set_attr "length" "2")])
 
-(define_expand "rdtsc"
-  [(set (match_operand:DI 0 "register_operand")
-	(unspec_volatile:DI [(const_int 0)] UNSPECV_RDTSC))]
-  ""
-{
-  if (TARGET_64BIT)
-    {
-      rtvec vec = rtvec_alloc (2);
-      rtx load = gen_rtx_PARALLEL (VOIDmode, vec);
-      rtx upper = gen_reg_rtx (DImode);
-      rtx lower = gen_reg_rtx (DImode);
-      rtx src = gen_rtx_UNSPEC_VOLATILE (DImode,
-					 gen_rtvec (1, const0_rtx),
-					 UNSPECV_RDTSC);
-      RTVEC_ELT (vec, 0) = gen_rtx_SET (VOIDmode, lower, src);
-      RTVEC_ELT (vec, 1) = gen_rtx_SET (VOIDmode, upper, src);
-      emit_insn (load);
-      upper = expand_simple_binop (DImode, ASHIFT, upper, GEN_INT (32),
-				   NULL, 1, OPTAB_DIRECT);
-      lower = expand_simple_binop (DImode, IOR, lower, upper, lower, 1,
-				   OPTAB_DIRECT);
-      emit_insn (gen_rtx_SET (VOIDmode, operands[0], lower));
-      DONE;
-    }
-})
-
-(define_insn "*rdtsc"
+(define_insn "rdtsc"
   [(set (match_operand:DI 0 "register_operand" "=A")
 	(unspec_volatile:DI [(const_int 0)] UNSPECV_RDTSC))]
   "!TARGET_64BIT"
@@ -18062,7 +18003,7 @@
   [(set_attr "type" "other")
    (set_attr "length" "2")])
 
-(define_insn "*rdtsc_rex64"
+(define_insn "rdtsc_rex64"
   [(set (match_operand:DI 0 "register_operand" "=a")
 	(unspec_volatile:DI [(const_int 0)] UNSPECV_RDTSC))
    (set (match_operand:DI 1 "register_operand" "=d")
@@ -18072,48 +18013,7 @@
   [(set_attr "type" "other")
    (set_attr "length" "2")])
 
-(define_expand "rdtscp"
-  [(match_operand:DI 0 "register_operand")
-   (match_operand:SI 1 "memory_operand")]
-  ""
-{
-  rtx di = gen_rtx_UNSPEC_VOLATILE (DImode,
-				    gen_rtvec (1, const0_rtx),
-				    UNSPECV_RDTSCP);
-  rtx si = gen_rtx_UNSPEC_VOLATILE (SImode,
-				    gen_rtvec (1, const0_rtx),
-				    UNSPECV_RDTSCP);
-  rtx reg = gen_reg_rtx (DImode);
-  rtx tmp = gen_reg_rtx (SImode);
-
-  if (TARGET_64BIT)
-    {
-      rtvec vec = rtvec_alloc (3);
-      rtx load = gen_rtx_PARALLEL (VOIDmode, vec);
-      rtx upper = gen_reg_rtx (DImode);
-      RTVEC_ELT (vec, 0) = gen_rtx_SET (VOIDmode, reg, di);
-      RTVEC_ELT (vec, 1) = gen_rtx_SET (VOIDmode, upper, di);
-      RTVEC_ELT (vec, 2) = gen_rtx_SET (VOIDmode, tmp, si);
-      emit_insn (load);
-      upper = expand_simple_binop (DImode, ASHIFT, upper, GEN_INT (32),
-				   NULL, 1, OPTAB_DIRECT);
-      reg = expand_simple_binop (DImode, IOR, reg, upper, reg, 1,
-				 OPTAB_DIRECT);
-    }
-  else
-    {
-      rtvec vec = rtvec_alloc (2);
-      rtx load = gen_rtx_PARALLEL (VOIDmode, vec);
-      RTVEC_ELT (vec, 0) = gen_rtx_SET (VOIDmode, reg, di);
-      RTVEC_ELT (vec, 1) = gen_rtx_SET (VOIDmode, tmp, si);
-      emit_insn (load);
-    }
-  emit_insn (gen_rtx_SET (VOIDmode, operands[0], reg));
-  emit_insn (gen_rtx_SET (VOIDmode, operands[1], tmp));
-  DONE;
-})
-
-(define_insn "*rdtscp"
+(define_insn "rdtscp"
   [(set (match_operand:DI 0 "register_operand" "=A")
 	(unspec_volatile:DI [(const_int 0)] UNSPECV_RDTSCP))
    (set (match_operand:SI 1 "register_operand" "=c")
@@ -18123,11 +18023,11 @@
   [(set_attr "type" "other")
    (set_attr "length" "3")])
 
-(define_insn "*rdtscp_rex64"
+(define_insn "rdtscp_rex64"
   [(set (match_operand:DI 0 "register_operand" "=a")
 	(unspec_volatile:DI [(const_int 0)] UNSPECV_RDTSCP))
    (set (match_operand:DI 1 "register_operand" "=d")
-        (unspec_volatile:DI [(const_int 0)] UNSPECV_RDTSCP))
+	(unspec_volatile:DI [(const_int 0)] UNSPECV_RDTSCP))
    (set (match_operand:SI 2 "register_operand" "=c")
 	(unspec_volatile:SI [(const_int 0)] UNSPECV_RDTSCP))]
   "TARGET_64BIT"