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| author | Kwok Cheung Yeung <kcy@codesourcery.com> | 2022-11-03 17:19:11 +0000 |
|---|---|---|
| committer | Kwok Cheung Yeung <kcy@codesourcery.com> | 2022-11-03 18:33:09 +0000 |
| commit | db6a9fe39ab08526b920af2b233b06860d286943 (patch) | |
| tree | e2513f168925356ae4acf48c283b0eda25d12340 /gcc/config/gcn | |
| parent | e177be86c7d327b9abd2441d52e3f240b3a488cd (diff) | |
| download | gcc-db6a9fe39ab08526b920af2b233b06860d286943.zip gcc-db6a9fe39ab08526b920af2b233b06860d286943.tar.gz gcc-db6a9fe39ab08526b920af2b233b06860d286943.tar.bz2 | |
amdgcn: Fix instruction generation for exp2 and log2 operations
The GCN instructions for the exp2 and log2 operations are v_exp_* and v_log_*
respectively, which unfortunately do not line up with the RTL naming
convention. To deal with this, a new set of int attributes is now used when
generating the assembly for these instructions.
2022-11-03 Kwok Cheung Yeung <kcy@codesourcery.com>
gcc/
* config/gcn/gcn-valu.md (math_unop_insn): New attribute.
(<math_unop><mode>2, <math_unop><mode>2<exec>, <math_unop><mode>2,
<math_unop><mode>2<exec>, *<math_unop><mode>2_insn,
*<math_unop><mode>2<exec>_insn): Use math_unop_insn to generate
assembler output.
gcc/testsuite/
* gcc.target/gcn/unsafe-math-1.c: New.
Diffstat (limited to 'gcc/config/gcn')
| -rw-r--r-- | gcc/config/gcn/gcn-valu.md | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 3b61951..9f43538 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -2549,13 +2549,21 @@ (UNSPEC_SIN "sin") (UNSPEC_COS "cos")]) +(define_int_attr math_unop_insn + [(UNSPEC_FLOOR "floor") + (UNSPEC_CEIL "ceil") + (UNSPEC_EXP2 "exp") + (UNSPEC_LOG2 "log") + (UNSPEC_SIN "sin") + (UNSPEC_COS "cos")]) + (define_insn "<math_unop><mode>2" [(set (match_operand:FP 0 "register_operand" "= v") (unspec:FP [(match_operand:FP 1 "gcn_alu_operand" "vSvB")] MATH_UNOP_1OR2REG))] "" - "v_<math_unop>%i0\t%0, %1" + "v_<math_unop_insn>%i0\t%0, %1" [(set_attr "type" "vop1") (set_attr "length" "8")]) @@ -2565,7 +2573,7 @@ [(match_operand:V_FP 1 "gcn_alu_operand" "vSvB")] MATH_UNOP_1OR2REG))] "" - "v_<math_unop>%i0\t%0, %1" + "v_<math_unop_insn>%i0\t%0, %1" [(set_attr "type" "vop1") (set_attr "length" "8")]) @@ -2575,7 +2583,7 @@ [(match_operand:FP_1REG 1 "gcn_alu_operand" "vSvB")] MATH_UNOP_1REG))] "flag_unsafe_math_optimizations" - "v_<math_unop>%i0\t%0, %1" + "v_<math_unop_insn>%i0\t%0, %1" [(set_attr "type" "vop1") (set_attr "length" "8")]) @@ -2585,7 +2593,7 @@ [(match_operand:V_FP_1REG 1 "gcn_alu_operand" "vSvB")] MATH_UNOP_1REG))] "flag_unsafe_math_optimizations" - "v_<math_unop>%i0\t%0, %1" + "v_<math_unop_insn>%i0\t%0, %1" [(set_attr "type" "vop1") (set_attr "length" "8")]) @@ -2595,7 +2603,7 @@ [(match_operand:FP_1REG 1 "gcn_alu_operand" "vSvB")] MATH_UNOP_TRIG))] "flag_unsafe_math_optimizations" - "v_<math_unop>%i0\t%0, %1" + "v_<math_unop_insn>%i0\t%0, %1" [(set_attr "type" "vop1") (set_attr "length" "8")]) @@ -2605,7 +2613,7 @@ [(match_operand:V_FP_1REG 1 "gcn_alu_operand" "vSvB")] MATH_UNOP_TRIG))] "flag_unsafe_math_optimizations" - "v_<math_unop>%i0\t%0, %1" + "v_<math_unop_insn>%i0\t%0, %1" [(set_attr "type" "vop1") (set_attr "length" "8")]) |