haifa-sched.c: Convert to target hooks.

	* haifa-sched.c: Convert to target hooks.  Macros replaced
	are ISSUE_RATE, ADJUST_COST, ADJUST_PRIORITY, MD_SCHED_INIT,
	MD_SCHED_REORDER, MD_SCHED_REORDER2, MD_SCHED_VARIABLE_ISSUE,
	MD_SCHED_FINISH, and HAVE_cycle_display.
	* target-def.h (TARGET_SCHED_ADJUST_COST,
	TARGET_SCHED_ADJUST_PRIORITY, TARGET_SCHED_ISSUE_RATE,
	TARGET_SCHED_VARIABLE_ISSUE, TARGET_SCHED_INIT,
	TARGET_SCHED_FINISH, TARGET_SCHED_REORDER,
	TARGET_SCHED_REORDER2, TARGET_SCHED_CYCLE_DISPLAY):
	New hook #defines to be overridden.
	(TARGET_SCHED): Bring them all together.
	(TARGET_INITIALIZER): Update.
	* target.h: Don't forward declare struct rtx_def.  Use 'rtx'
	instead of 'struct rtx_def *' throughout.
	(struct sched): New set of hooks for the scheduler.
	* Makefile.in (haifa-sched.o): Depend on target.h.
	* doc/tm.texi: Document the new scheduler hooks, together in
	their own section, instead of scattered around.
	Fix a bunch of underfull/overfull hboxes.

	* a29k.h, alpha.h, arm.h, c4x.h, convex.h, d30v.h, i386.h,
	ia64.h, m32r.h, m88k.h, mips.h, pa.h, rs6000.h, s390.h, sh.h,
	sparc.h: Don't define any of the old scheduler macros.

	* a29k.c, alpha.c, arm.c, c4x.c, convex.c, d30v.c, i386.c,
	ia64.c, m32r.c, m88k.c, mips.c, pa.c, rs6000.c, s390.c, sh.c,
	sparc.c: Create hook functions from code extracted from
	corresponding target header, or make existing hooks static, as
	appropriate.  Set the appropriate entries in targetm.

	* alpha-protos.h, arm-protos.h, c4x-protos.h, d30v-protos.h,
	i386-protos.h, ia64-protos.h, m32r-protos.h, pa-protos.h,
	rs6000-protos.h, s390-protos.h, sparc-protos.h:
	Remove prototypes for functions which are now static.

	* d30v.h, d30v.c, m32r.h, m32r.c: Remove #ifdef HAIFA and
	related gunk; the Haifa scheduler is now the only choice.

From-SVN: r45009

1 files changed, 17 insertions, 2 deletions

diff --git a/gcc/config/d30v/d30v.c b/gcc/config/d30v/d30v.c
index cf5918f..2af7b26 100644
--- a/gcc/config/d30v/d30v.c
+++ b/gcc/config/d30v/d30v.c
@@ -51,6 +51,8 @@ static void d30v_mark_machine_status PARAMS ((struct function *));
 static void d30v_free_machine_status PARAMS ((struct function *));
 static void d30v_output_function_prologue PARAMS ((FILE *, HOST_WIDE_INT));
 static void d30v_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT));
+static int d30v_adjust_cost PARAMS ((rtx, rtx, rtx, int));
+static int d30v_issue_rate PARAMS ((void));
 
 /* Define the information needed to generate branch and scc insns.  This is
    stored from the compare operation.  */
@@ -86,6 +88,10 @@ enum reg_class reg_class_from_letter[256];
 #define TARGET_ASM_FUNCTION_PROLOGUE d30v_output_function_prologue
 #undef TARGET_ASM_FUNCTION_EPILOGUE
 #define TARGET_ASM_FUNCTION_EPILOGUE d30v_output_function_epilogue
+#undef TARGET_SCHED_ADJUST_COST
+#define TARGET_SCHED_ADJUST_COST d30v_adjust_cost
+#undef TARGET_SCHED_ISSUE_RATE
+#define TARGET_SCHED_ISSUE_RATE d30v_issue_rate
 
 struct gcc_target targetm = TARGET_INITIALIZER;
 
@@ -3490,7 +3496,7 @@ d30v_machine_dependent_reorg (insn)
 /* For the d30v, try to insure that the source operands for a load/store are
    set 2 cycles before the memory reference.  */
 
-int
+static int
 d30v_adjust_cost (insn, link, dep_insn, cost)
      rtx insn;
      rtx link ATTRIBUTE_UNUSED;
@@ -3511,13 +3517,22 @@ d30v_adjust_cost (insn, link, dep_insn, cost)
 	  || (GET_CODE (mem = SET_DEST (set_insn)) == MEM
 	      && reg_mentioned_p (reg, XEXP (mem, 0))))
 	{
-	  return cost + ((HAIFA_P) ? 2 : 4);
+	  return cost + 2;
 	}
     }
 
   return cost;
 }
 
+/* Function which returns the number of insns that can be
+   scheduled in the same machine cycle.  This must be constant
+   over an entire compilation.  The default is 1.  */
+static int
+d30v_issue_rate ()
+{
+  return 2;
+}
+
 
 /* Routine to allocate, mark and free a per-function,
    machine specific structure.  */