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authorKazu Hirata <kazu@gcc.gnu.org>2003-12-13 04:44:12 +0000
committerKazu Hirata <kazu@gcc.gnu.org>2003-12-13 04:44:12 +0000
commit839a4992763cebcd13bb32ce3db276aacfc9202f (patch)
treed9001101e775f138ac18b4710a96538eb9e267a3 /gcc/config/c4x
parentda1d7781e46e20a148ec5e277fb891301616e7c6 (diff)
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vxlib.c: Fix comment typos.
* config/vxlib.c: Fix comment typos. * config/alpha/alpha.c: Likewise. * config/arm/arm.c: Likewise. * config/arm/arm.md: Likewise. * config/c4x/c4x.c: Likewise. * config/c4x/c4x.md: Likewise. * config/cris/cris.h: Likewise. * config/cris/cris.md: Likewise. * config/fr30/fr30.c: Likewise. * config/fr30/fr30.h: Likewise. * config/fr30/fr30.md: Likewise. * config/frv/frv.c: Likewise. * config/frv/frv.md: Likewise. * config/frv/frvbegin.c: Likewise. * config/i386/athlon.md: Likewise. * config/i386/i386.c: Likewise. * config/i386/i386.md: Likewise. * config/i386/sco5.h: Likewise. * config/ia64/ia64.md: Likewise. * config/ip2k/ip2k.c: Likewise. * config/ip2k/ip2k.md: Likewise. * config/m68hc11/m68hc11.h: Likewise. * config/m68k/m68k.h: Likewise. * config/mips/mips.c: Likewise. * config/rs6000/rs6000.c: Likewise. * config/s390/s390.md: Likewise. * config/sh/sh.h: Likewise. * config/sparc/sparc.md: Likewise. * config/v850/v850.c: Likewise. * config/v850/v850.h: Likewise. * config/v850/v850.md: Likewise. * config/xtensa/xtensa.c: Likewise. From-SVN: r74596
Diffstat (limited to 'gcc/config/c4x')
-rw-r--r--gcc/config/c4x/c4x.c2
-rw-r--r--gcc/config/c4x/c4x.md8
2 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/c4x/c4x.c b/gcc/config/c4x/c4x.c
index 7fb5a33..9eaa8719 100644
--- a/gcc/config/c4x/c4x.c
+++ b/gcc/config/c4x/c4x.c
@@ -1088,7 +1088,7 @@ c4x_expand_epilogue(void)
dont_pop_ar3 = 0; /* If we use ar3, we need to pop it. */
if (size || current_function_args_size)
{
- /* If we are ommitting the frame pointer, we still have
+ /* If we are omitting the frame pointer, we still have
to make space for it so the offsets are correct
unless we don't use anything on the stack at all. */
size += 1;
diff --git a/gcc/config/c4x/c4x.md b/gcc/config/c4x/c4x.md
index 5755177..e4f240f 100644
--- a/gcc/config/c4x/c4x.md
+++ b/gcc/config/c4x/c4x.md
@@ -157,7 +157,7 @@
; a register satisying the 'f' constraint is used as a dst operand,
; the CC gets clobbered (except for LDFcond).
-; The ! in front of the 'b' constaint says to GCC to disparage the
+; The ! in front of the 'b' constraint says to GCC to disparage the
; use of this constraint. The 'b' constraint applies only to the SP.
; Note that we deal with the condition code CC like some of the RISC
@@ -173,7 +173,7 @@
; delayed branch slots.
; Since the C[34]x has many instructions that set the CC, we pay the
-; price of having to explicity define which insns clobber the CC
+; price of having to explicitly define which insns clobber the CC
; (rather than using the macro NOTICE_UPDATE_CC).
; Note that many patterns say that the CC is clobbered when in fact
@@ -6265,7 +6265,7 @@
;
; MULF
;
-; The C3x MPYF only uses 24 bit precision while the C4x uses 32 bit precison.
+; The C3x MPYF only uses 24-bit precision while the C4x uses 32-bit precision.
;
(define_expand "mulhf3"
[(parallel [(set (match_operand:HF 0 "reg_operand" "=h")
@@ -7320,7 +7320,7 @@
"stf\\t%1,*%0++\\n\\tstf\\t%2,*%0++")
-; The following two peepholes remove an unecessary load
+; The following two peepholes remove an unnecessary load
; often found at the end of a function. These peepholes
; could be generalized to other binary operators. They shouldn't
; be required if we run a post reload mop-up pass.